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參數(shù)資料
| 型號： | ZN429J-8 |
| 英文描述： | 8-Bit Digital-to-Analog Converter |
| 中文描述： | 8位數(shù)字到模擬轉(zhuǎn)換器 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大小： | 195K |
| 代理商： | ZN429J-8 |
ZN429
UNIPOLAR ADJUSTMENT PROCEDURE
(i) Set all bits to OFF (LOW) and adjust zero until V
0.0000V.
(ii) Set all bits ON (HIGH) and adjust gain until V
FS - 1LSB.
UNIPOLAR SETTING UP POINTS
OUT
=
OUT
=
1LSB = FS
256
UNIPOLAR LOGIC CODING
Output Range, +FS
LSB
FS - 1LSB
+5V
19.5 mV
4.9805V
+10V
39.1mV
9.9609V
Input Code
(Binary)
Analog Output
(Nominal Value)
11111111
11111110
11000000
10000001
10000000
01111111
01000000
00000001
00000000
FS - 1LSB
FS - 2 LSB
3
/
4
FS
1
/
2
FS + 1LSB
1
/
2
FS
1
/
2
FS - 1LSB
1
/
4
FS
1LSB
0
(2) Bipolar D-A Converter
For bipolar operation the output from the ZN429 is offset
by half full-scale by connecting a resistor R3 between V
IN
and the inverting input of the buffer amplifier (Fig.6).
When the digital input of the ZN429 is zero the analog
output is zero and the amplifier output should be -full-scale.
An input of all ones to the D-A will give a ZN429 output of
V
REF IN
and the amplifier output required is +full-scale. Also,
to match the ladder resistance the parallel combination of
R
1
, R
2
and R
3
should be 10k
The nominal values of R
1
, R
conditions are given by
R1 = 20Gk
, R2 = 20G/(G-1)k
and R3 = 20k
.
where the resultant output range is
±
G.V
REF IN
.
Assuming that V
REF IN
= 2.5V the nominal values of
resistors for
±
5 and
±
10V output ranges are given in the
following table:
REF
d
.
2
and R
3
which meet these
Minus full scale (0FFSET) is set by adjusting R1 about
its nominal value relative to R3. Plus full-scale (GAIN) is set
by adjusting R2 relative to R1.
Settling time for a major transistion is 2.5
μ
s typical.
Output Range
G
R
1
R
2
R
3
±
5V
2
40k
40k
20k
±
10V
4
80k
26.67k
20k
Fig.5 Unipolar operation - component values
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