參數(shù)資料
型號(hào): ZNBG3000Q16
廠商: ZETEX PLC
元件分類: 模擬信號(hào)調(diào)理
英文描述: TV 6C 6#8(TWINAX) PIN RECP
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO16
封裝: QSOP-16
文件頁(yè)數(shù): 5/9頁(yè)
文件大?。?/td> 204K
代理商: ZNBG3000Q16
FUNCTIONAL DIAGRAM
FUNCTIONAL DESCRIPTION
The ZNBG devices provide all the bias requirements for external FETs, including the generation
of the negative supply required for gate biasing, from the single supply voltage.
The diagram above shows a single stage from the ZNBG series. The ZNBG3000/1 contains 3 such
stages.
The drain voltage of the external FET Q
N
is set by the ZNBG device to its normal operating voltage.
This is determined by the on board V
D
Set reference, for the ZNBG3000 this is nominally 2.2 volts
whilst the ZNBG3001 provides nominally 2 volts.
The drain current taken by the FET is monitored by the low value resistor I
Sense. The amplifier
driving the gate of the FET adjusts the gate voltage of Q
N
so that the drain current taken matches
the current called for by an external resistor R
CAL
. Both ZNBG devices have the facility to program
different drain currents into selected FETs.
Since the FET is a depletion mode transistor, it is usually necessary to drive its gate negative with
respect to ground to obtain the required drain current. To provide this capability powered from
a single positive supply, the device includes a low current negative supply generator. This
generator uses an internal oscillator and two external capacitors, C
NB
and C
SUB
.
4-141
ZNBG3000
ZNBG3001
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