On chip series regulators drop " />
參數(shù)資料
型號(hào): ZXCD1210JB16TA
廠商: Diodes Inc
文件頁數(shù): 4/8頁
文件大?。?/td> 0K
描述: IC AMP AUDIO CLASS D 16QFN
標(biāo)準(zhǔn)包裝: 1
類型: 調(diào)制器
應(yīng)用: 多媒體
安裝類型: 表面貼裝
封裝/外殼: 16-QFN
供應(yīng)商設(shè)備封裝: 16-QFN-EP(4x4)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 1479 (CN2011-ZH PDF)
其它名稱: ZXCD1210JB16DKR
ZXCD1210
Zetex Semiconductors plc 2007
Functional description
On chip series regulators drop the external VCC supply (12V recommended) to the 9V and 5.5V
supplies required by the internal circuitry of the device.
The on chip oscillator produces a clock which is set to approximately 200kHz by an external
capacitor and an on chip resistor. The clock is set at least an order higher in frequency than the
audio input. This clock is a triangle waveform which is used to modulate the incident analogue
signal in order to produce the required PWM output.
With no audio input signal applied, the PWM duty cycle is nominally 50%. As the audio input
signal ascends towards the peak level, the crossing points with the (higher frequency) triangle
wave also ascend. The PWM output exhibits a corresponding increase in output duty cycle.
Similarly, as the audio input signal descends, the duty cycle is correspondingly reduced. Thus the
triangle modulates the audio input generating a pulse width modulated (PWM) output. This
principle is illustrated below.
The PWM outputs drive the speaker load with the audio information contained in the PWM signal,
via the off chip gate drivers, H bridge and single stage LC filter network.
The triangle amplitude is approximately 1V. The audio inputs are internally biased to a DC voltage
of approximately VCC/5. The mid point DC level of the modulation control is around 2V. The
triangular wave at the CK pin traverses between about 2.7V and 3.8V.
Audio
Triangle
PWM comparator
PWM output
Audio
Comparator O/P (duty cycle = 50%)
Comparator O/P (duty cycle = 75%)
Triangle
Output
Audio
Triangle
Output
Triangle input
Audio input
PWM output
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