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參數(shù)資料
| 型號： | μPD42280 |
| 廠商： | NEC Corp. |
| 英文描述： | 2 M-Bit Field Buffer(2M位現(xiàn)場緩存) |
| 中文描述： | 2 m位場緩沖器（200萬位現(xiàn)場緩存） |
| 文件頁數(shù)： | 4/28頁 |
| 文件大?。?/td> | 200K |
| 代理商： | ΜPD42280 |
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4
μ
PD42280
1.
PIN FUNCTION
Pin name
Input/Output
Function
Dl0 to DI7
I
This is a write data input. Fetching data is executed on the back rise up edge of
WCK input cycle, and the setup/hold time (t
DS
, t
DH
) are specified against the edge.
DO0 to DO7
O
This is a read data output. The access time is specified from the front rise up edge
of RCK cycle and determined by t
AC
. It is 3 state output.
(3-state)
WRST
I
This is a reset input for initializing a write address.
Fetching reset signals is executed on the front rise up edge of WCK input cycle,
and the setup/hold time (t
RS
, t
RH
) are specified against the edge.
RRST
I
This is a reset input for initializing a read address.
Fetching reset signals is executed on the front rise up edge of RCK input cycle, and
the setup/hold time (t
RS
, t
RH
) are specified against the edge.
WE
I
This is a write operation control input. In case of high level, the internal write
operation is prohibited, and the write address pointer is also stopped at the
present
position. WE signal is fetched on the front rise up edge of WCK input cycle.
RE
I
This is a read operation control input. In case of high level, the internal read
operation is executed, and the read address pointer is stopped at the present
position. RE signal is fetched on the front rise up edge of RCK input cycle.
OE
I
This is a read data control input. In case of high-level, DO0 to DO7 will be high
impedance. In the read address pointer an increment is executed synchronously for
RCK, not depending on the OE signal input level. OE signal is fetched on the front
rise up edge of RCK input cycle.
WCK
I
This is a write clock input. The write operation is executed synchronously for the
write clock when WE is in low level, and in the write address pointer, the increment is
executed at the same time.
RCK
I
This is a read clock input. The read operation is done synchronously for the read
clock, and when RE is in low level, in the read address pointer the increment is
executed at the same time.
TEST
I
This is a pin for testing. It is to be fixed on low level on the practical operation.
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