參數(shù)資料
型號: μPD750004
廠商: NEC Corp.
英文描述: 4 Bit Single Chip Microcontrollers(4位單片微控制器)
中文描述: 4位單片微控制器(4位單片微控制器)
文件頁數(shù): 19/84頁
文件大?。?/td> 464K
代理商: ΜPD750004
19
m
PD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)
Fig. 5-3 Program Memory Map (in
m
PD750008)
Note
Can be used only in the Mk
II
mode.
Remark
In addition to the above, the BR PCDE and BR PCXA instructions can cause a branch to an address with
only the 8 low-order bits of the PC changed.
0 0 0 0 H
Address
0 0 0 2 H MBE RBE
0
INTBT/INT4
(high-order 5 bits)
start address
0 0 0 4 H MBE RBE
0
INT0
(high-order 5 bits)
start address
0 0 0 6 H MBE RBE
0
INT1
(high-order 5 bits)
start address
0 0 0 8 H MBE RBE
0
INTCSI
(high-order 5 bits)
start address
0 0 0 A H MBE RBE
0
INTT0
(high-order 5 bits)
start address
0 0 2 0 H
0 0 7 F H
0 0 8 0 H
0 7 F F H
0 8 0 0 H
MBE RBE
0
Internal reset start address
(high-order 5 bits)
0 F F F H
1 0 0 0 H
1 F F F H
GETI instruction reference table
0 0 0 C H MBE RBE
0
INTT1
(high-order 5 bits)
start address
(low-order 8 bits)
(low-order 8 bits)
(low-order 8 bits)
(low-order 8 bits)
(low-order 8 bits)
(low-order 8 bits)
(low-order 8 bits)
CALLF
!faddr
instruction
entry
address
BRCB !caddr
instruction
branch
address
Branch address
of BR BCXA, BR
BCDE, BR !addr,
BRA !addr1
or
CALLA !addr1
Note
instruction
CALL !addr
instruction
subroutine entry
address
BR $addr
instruction relative
branch address
-15 to -1,
+2 to +16
Branch destination
address and
subroutine entry
address when GETI
instruction is executed
BRCB !caddr
instruction
branch
address
7
6
5
0
Internal reset start address
INTBT/INT4
INT0
INT1
INTCSI
INTT0
INTT1
start address
start address
start address
start address
start address
start address
相關(guān)PDF資料
PDF描述
μPD750004(A) 4 Bit Single Chip Microcontrollers(4位單片微控制器)
μPD750006 4 Bit Single Chip Microcontrollers(4位單片微控制器)
μPD750006(A) 4 Bit Single Chip Microcontrollers(4位單片微控制器)
μPD750008 4 Bit Single Chip Microcontrollers(4位單片微控制器)
μPD750008(A) 4 Bit Single Chip Microcontrollers(4位單片微控制器)
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