μ
PD780306Y, 780308Y
5
OVERVIEW OF FUNCTION
Product Name
μ
PD780306Y
μ
PD780308Y
Item
48K bytes
60K bytes
1024 bytes
1024 bytes
40
×
4 bits
8 bits
×
32 registers (8 bits
×
8 registers
×
4 banks)
On-chip minimum instruction execution time cycle modification function
0.4
μ
s/0.8
μ
s/1.6
μ
s/3.2
μ
s/6.4
μ
s/12.8
μ
s (at 5.0 MHz operation)
122
μ
s (at 32.768 kHz operation)
16-bit operation
Multiplication/division (8 bits
×
8 bits,16 bits
÷
8 bits)
Bit manipulation (set, reset, test, boolean operation)
BCD correction, etc.
Total
CMOS input
CMOS I/O
: 57
:
0
2
: 55
8-bit resolution
×
8 channels
Segment signal output : Maximum 40
Common signal output: Maximum 4
Bias
: 1/2 or 1/3 switchable
3-wire serial I/O/I
2
C bus/2-wire serial I/O mode selectable : 1 channel
3-wire serial I/O/UART mode selectable
3-wire serial I/O mode
: 1 channel
: 1 channel
16-bit timer/event counter : 1 channel
8-bit timer/event counter
Watch timer
Watchdog timer
: 2 channels
: 1 channel
: 1 channel
3 (14-bit PWM output capability : 1)
19.5 kHz, 39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz, 2.5 MHz,
5.0 MHz (at main system clock: 5.0 MHz operation)
32.768 kHz (at subsystem clock: 32.768 kHz operation)
1.2 kHz, 2.4 kHz, 4.9 kHz, 9.8 kHz (at main system clock 5.0 MHz operation)
Internal: 13, external: 6
Internal: 1
1
Internal: 1, external: 1
V
DD
= 2.0 to 5.5 V
100-pin plastic LQFP (Fine pitch) (14
×
14 mm)
100-pin plastic QFP (14
×
20 mm)
ROM
High-speed RAM
Expansion RAM
LCD display RAM
Internal
memory
When main system clock
selected
When subsystem clock
selected
Instruction set
I/O ports
(including segment signal output pins)
A/D converter
LCD controller/driver
Serial interface
Timer
Vectored
interrupt
sources
Maskable
Non-maskable
Software
Package
General registers
Minimum instruction execution time
Timer output
Clock output
Test input
Supply voltage
Buzzer output