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參數(shù)資料
| 型號： | μPD78053 |
| 廠商： | NEC Corp. |
| 英文描述： | 8 Bit Single Chip Microcontrollers(8位單片微控制器) |
| 中文描述： | 8位單片機微控制器（8位單片微控制器） |
| 文件頁數(shù)： | 39/78頁 |
| 文件大?。?/td> | 597K |
| 代理商： | ΜPD78053 |
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39
μ
PD78052, 78053, 78054, 78055, 78056, 78058
Main System Clock Oscillation Circuit Characteristics (T
A
= –40 to +85
°
C, V
DD
= 2.0 to 6.0 V)
Recommended
Circuit
TYP.
MAX.
5.0
4
5.0
10
30
5.0
500
Unit
MHz
ms
MHz
ms
MHz
ns
Resonator
Ceramic
resonator
Crystal
resonator
External
clock
Parameter
Oscillator
frequency (fx)
Note 1
Oscillation
stabilization time
Note 2
Oscillator
frequency (fx)
Note 1
Oscillation
stabilization time
Note 2
X1 input
frequency (fx)
Note 1
X1 input
high/low level width
(t
XH
, t
XL
)
Notes 1.
Indicates only oscillation circuit characteristics. Refer to
AC Characteristics
for instruction execution
time.
2.
Time required to stabilize oscillation after reset or STOP mode release.
Cautions 1. When using the main system clock oscillator, wirinin the area enclosed with the broken line
should be carried out as follows to avoid an adverse effect from wiring capacitance.
Wiring should be as short as possible.
Wiring should not cross other signal lines.
Wiring should not be placed close to a varying high current.
The potential of the oscillator capacitor ground should be the same as V
SS
.
Do not ground wiring to a ground pattern in which a high current flows.
Do not fetch a signal from the oscillator.
2. When the main system clock is stopped and the system is operated by the subsystem clock,
the subsystem clock should be switched again to the main system clock after the oscillation
stabilization time is secured in software.
MIN.
1.0
1.0
1.0
85
Test Conditions
V
DD
= Oscillator
voltage range
After V
DD
reaches oscil-
lator voltage range MIN.
V
DD
= 4.5 to 6.0 V
X1
X2
C2
C1
V
SS
R1
X1
X2
C2
C1
V
SS
X1
X2
PD74HCU04
μ
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