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參數(shù)資料
| 型號： | μPD78058F(A) |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8 Bit Single Chip Microcontrollers |
| 中文描述： | 8位單片機(jī)微控制器 |
| 文件頁數(shù)： | 39/74頁 |
| 文件大?。?/td> | 549K |
| 代理商： | ΜPD78058F(A) |
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39
μ
PD78058F(A)
XT1
XT2
Subsystem Clock Oscillation Circuit Characteristics (T
A
= –40 to +85
°
C, V
DD
= 2.7 to 6.0 V)
Notes
1.
Indicates only oscillation circuit characteristics. Refer to “
AC CHARACTERISTICS
” for instruction
execution time.
2.
Time required to stabilize oscillation after V
DD
reaches MIN. oscillating voltage frequency.
Cautions
1. When using the subsystem clock oscillator, wiring in the area enclosed with the broken line
in the above figures should be carried out as follows to avoid an adverse effect from wiring
capacitance.
Wiring should be as short as possible.
Wiring should not cross other signal lines.
Wiring should not be placed close to a varying high current.
The potential of the oscillator capacitor ground should be the same as V
SS
.
Do not ground wiring to a ground pattern in which a high current flows.
Do not fetch a signal from the oscillator.
2. The subsystem clock oscillator is a low-amplitude circuit in order to achieve a low consumption
current, and is more prone to mulfunction due to noise than the main system clock oscillator.
Particular care is therefore required with the wiring method when the subsystem clock is used.
Resonator
Recommended
Circuit
Parameter
Test Conditions
MIN.
TYP.
MAX.
Unit
Ceramic
resonator
Oscillator
frequency (f
XT
)
Note 1
32
32.768
35
kHz
Oscillation
stabilization time
Note 2
V
DD
= 4.5 to 6.0 V
1.2
2
s
10
External
clock
XT1 input
frequency (f
XT
)
Note 1
32
100
kHz
XT1 input
high/low level width
(t
XTH
, t
XTL
)
5
15
μ
s
XT2
XT1
IC
R1
C4
C3
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