60
μ
PD78058F(A)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Resolution
8
bit
Overall error
R = 2 M
Note 1
1.2
%
R = 4 M
Note 1
0.8
%
R = 10 M
Note 1
0.6
%
Settling time
C = 30 pF
Note 1
4.5 V
≤
AV
REF1
≤
6.0 V
10
μ
s
2.7 V
≤
AV
REF1
< 4.5 V
15
μ
s
Output resistance
R
O
Note 2
10
k
Analog reference voltage
AV
REF1
2.0
V
DD
V
Resistance between AV
REF1
and AV
SS
R
AIREF1
DACS0, DACS1 = 55H
Note 2
4
8
k
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Resolution
8
8
8
bit
Overall error
Note
2.7 V
≤
AV
REF0
≤
AV
DD
±
0.6
%
Conversion time
t
CONV
19.1
200
μ
s
Sampling time
t
SAMP
12/f
XX
μ
s
Analog input voltage
V
IAN
AV
SS
AV
REF0
V
Reference voltage
AV
REF0
2.7
AV
DD
V
Resistance between AV
REF0
and
AV
SS
R
AIREF0
4
14
k
UART Mode (External Clock Input) :
A/D Converter Characteristics (T
A
= –40 to +85
°
C, AV
DD
= V
DD
= 2.7 to 6.0 V, AV
SS
= V
SS
= 0 V)
Note
Overroll error excluding quantization error (
±
1/2 LSB). It is indicated as a ratio to the full-scale value.
Caution
For pins that also function as port pins (refer to 3.1 Port Pins), do not perform the following
operations during A/D conversion. If these operations are performed, the total error ratings cannot
be kept (except for LCD segment output alternate-function pin).
(1)
Rewrite the output latch while the pin is used as a port pin.
(2)
Change the output level of the pin used as an output pin, even if it is not used as a port pin.
Remarks 1.
f
XX
: Main system clock frequency (f
X
or f
X
/2)
2.
f
X
: Main system clock oscillation frequency
D/A Converter Characteristics (T
A
= –40 to +85
°
C, V
DD
= 2.7 to 6.0 V, AV
SS
= V
SS
= 0 V)
Notes
1.
R and C denote the D/A converter output pin load resistance and load capacitance, respectively.
2.
Value for 1 D/A converter channel
Remark
DACS0, DACS1: D/A conversion value setting register 0, 1
t
KCY12
t
KH12
t
KL12
t
F12
t
R12
ASCK