參數(shù)資料
型號: μPD78058Y
廠商: NEC Corp.
英文描述: 8Bit Single Chip Microcontrollers(8位單片微控制器)
中文描述: 8位單芯片微控制器(8位單片微控制器)
文件頁數(shù): 12/74頁
文件大小: 574K
代理商: ΜPD78058Y
12
μ
PD78052Y, 78053Y, 78054Y, 78055Y, 78056Y, 78058Y
3.2
Non-port Pins (1/2)
Pin Name
I/O
Function
After
Reset
Alternate
Function
INTP0
Input
External interrupt request input for which the effective edge (rising
edge, falling edge, or both rising edge and falling edge) can be
specified.
Input
P00/TI00
INTP1
P01/TI01
INTP2
P02
INTP3
P03
INTP4
P04
INTP5
P05
INTP6
P06
SI0
Input
Serial interface serial data input.
Input
P25/SB0/SDA0
SI1
P20
SI2
P70/RxD
SO0
Output
Serial interface serial data output.
Input
P26/SB1/SDA1
SO1
P21
SO2
P71/TxD
SB0
Input/
output
Serial interface serial data input/output.
Input
P25/SI0/SDA0
SB1
P26/SO0/SDA1
SDA0
P25/SI0/SB0
SDA1
P26/SO0/SB1
SCK0
Input/
output
Serial interface serial clock input/ output
Input
P27/SCL
SCK1
P22
SCK2
P72/ASCK
SCL
P27/SCK0
STB
Output
Serial interface automatic transmit/receive strobe output.
Input
P23
BUSY
Input
Serial interface automatic transmit/receive busy input.
Input
P24
RxD
Input
Asynchronous serial interface serial data input.
Input
P70/SI2
TxD
Output
Asynchronous serial interface serial data output.
Input
P71/SO2
ASCK
Input
Asynchronous serial interface serial clock input.
Input
P72/SCK2
TI00
Input
External count clock input to the 16-bit timer (TM0)
Input
P00/INTP0
TI01
Capture trigger signal input to the capture register (CR00)
P01/INTP1
TI1
External count clock input to the 8-bit timer (TM1)
P33
TI2
External count clock input to the 8-bit timer (TM2)
P34
TO0
Output
16-bit timer (TM0) output (dual-function as 14-bit PWM output)
Input
P30
TO1
8-bit timer (TM1) output
P31
TO2
8-bit timer (TM2) output
P32
PCL
Output
Clock output (for main system clock, subsystem clock trimming).
Input
P35
BUZ
Output
Buzzer output.
Input
P36
RTP0 to RTP7 Output
Real-time output port by which data is output in synchronization with a trigger.
Input
P120 to P127
AD0 to AD7
Input/
output
Low-order address/data bus at external memory expansion.
Input
P40 to P47
A8 to A15
Output
High-order address bus at external memory expansion.
Input
P50 to P57
RD
Output
External memory read operation strobe signal output.
Input
P64
WR
External memory write operation strobe signal output.
P65
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