40
m
m
PD78062Y, 78063Y, 78064Y
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
P00 to P05, P10 to P17,
P25 to P27, P30 to P37,
P70 to P72, P80 to P87,
P90 to P97, P100 to P103,
P110 to P117
3
m
A
I
LIH2
X1, X2, XT1/P07, XT2
20
m
A
P00 to P05, P10 to P17,
P25 to P27, P30 to P37,
P70 to P72, P80 to P87,
P90 to P97, P100 to P103,
P110 to P117
–3
m
A
I
LIH2
X1, X2, XT1/P07, XT2
–20
m
A
I
LOH
V
O
= V
DD
3
m
A
I
LOL
V
O
= 0 V
–3
m
A
V
I
= 0 V, P01 to P05,
P10 to P17, P25 to P27,
P30 to P37, P70 to P72,
P80 to P87, P90 to P97,
P100 to P103, P110 to P117
R
V
DD
= 5.0 V ± 10 %
Note4
4
12
mA
V
DD
= 3.0 V ± 10 %
Note5
0.6
1.8
mA
V
DD
= 2.2 V ± 10 %
Note5
0.35
1.05
mA
V
DD
= 5.0 V ± 10 %
Note4
6.5
19.5
mA
V
DD
= 3.0 V ± 10 %
Note5
0.8
2.4
mA
V
DD
= 5.0 V ± 10 %
1.4
4.2
mA
V
DD
= 3.0 V ± 10 %
500
1500
m
A
V
DD
= 2.2 V ± 10 %
280
840
m
A
V
DD
= 5.0 V ± 10 %
1.6
4.8
mA
V
DD
= 3.0 V ± 10 %
650
1950
m
A
DC Characteristics (T
A
= –40 to +85 °C, V
DD
= 2.0 to 6.0 V)
Parameter
V
I
= V
DD
I
LIH1
V
I
= 0 V
I
LIL1
I
DD2
2.7 V
£
V
DD
< 4.5 V
20
500 k
W
Input leakage
current high
Input leakage
current low
Output leakage
current high
Output leakage
current low
Software
pull-up resistor
Supply
current
Note1
4.5 V
£
V
DD
£
6.0 V
15
40
90
k
W
Remark
Unless otherwise specified, the characteristics of dual-function pins are the same as those of port pins.
Notes 1.
Not including currents flowing in on-chip pull-up resistors or LCD split resistors.
2.
Main system clock f
XX
= f
X
/2 operation (when oscillation mode selection register (OSMS) is set to 00H)
3.
Main system clock f
XX
= f
X
operation (when OSMS is set to 01H)
4.
High-speed mode operation (when processor clock control register (PCC) is set to 00H)
5.
Low-speed mode operation (when PCC is set to 04H)
5.00 MHz, Crystal oscillation (f
XX
= 2.5 MHz)
Note2
operating mode
I
DD1
5.00 MHz, Crystal oscillation
(f
XX
= 5.0 MHz)
Note3
HALT mode
5.00 MHz, Crystal oscillation
(f
XX
= 2.5 MHz)
Note2
HALT mode
5.00 MHz, Crystal oscillation
(f
XX
= 5.0 MHz)
Note3
operating mode