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CHAPTER 13 A/D CONVERTER
13.4.5 A/D Conversion Operation Start by Hardware
An A/D conversion operation start by hardware is made possible by setting both the TRG bit and the AM0 bit or AM1
bit of the A/D converter mode register (ADM) to 1. When the TRG bit and the AM0 bit or AM1 bit of the ADM are both set
to 1, external signals are placed in the standby state, and an A/D conversion operation is started when a valid edge is input
to the INTP4 pin (P25 pin).
If another valid edge is input to the INTP4 pin after the A/D conversion operation has been started by a valid edge input
to the INTP4 pin, the A/D conversion operation being performed at that time is suspended, and A/D conversion is performed
from the beginning in accordance with the contents set in the ADM.
If a value is written to the ADM during an A/D conversion operation (AM0 bit or AM1 = 1) such that the TRG bit and AM0
bit or AM1 bit are both set to 1 again, the A/D conversion operation being performed at that time is suspended (the standby
state is also suspended), and a state is entered in which the A/D converter waits for input of a valid edge to the INTP4 pin
in the A/D conversion operation mode in accordance with the written value, and a conversion operation is started when
a valid edge is input.
Use of this function allows A/D conversion operations to be synchronized with external signals. Once A/D conversion
operation is started, as soon as one A/D conversion operation ends the next A/D conversion operation is started in
accordance with the operating mode set by the ADM (the A/D converter does not wait for INTP4 pin input), and conversion
operations continue repeatedly until an instruction that writes to the ADM is executed, or a valid edge is input to the INTP4
pin.
(1) A/D conversion in select mode (1-buffer mode)
A/D conversion of the analog input set by the A/D converter mode register (ADM) is started. When conversion has
been completed, the same analog input is converted again. Each time A/D conversion has been completed, the
A/D conversion end interrupt request (INTAD) is generated.
If the valid edge is input to the INTP4 pin during A/D conversion, the A/D conversion under execution is stopped
once, and then conversion is newly started.
Figure 13-14. A/D Conversion in Select Mode (1-buffer mode) Started by Hardware
ADM Written
TRG
←
1
AM1, AM0
←
10
PS
←
0
ANIS2-ANIS0
←
001
ADM Rewritten
TRG
←
1
AM1, AM0
←
10
PS
←
0
ANIS2-ANIS0
←
101
Standby State
INTAD
A/D Conversion
ADCR1,
ADCR5
INTP4
ANI1
(ADCR1)
ANI1
ANI1
ANI1
ANI1
Standby State
ANI5
ANI5
ANI1
(ADCR1)
ANI5
(ADCR5)