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CHAPTER 18 STANDBY FUNCTION
18.7 Cautions
(1) If a condition that releases the HALT mode comes into effect when the HALT/STOP/IDLE mode (hereafter referred
to as standby mode) is being set (refer to
18.3.2 HALT mode release
), the standby mode is not entered, and the
next instruction is executed, or a branch to a vectored interrupt service program is performed. Before this branch
execution, the instructions after the standby mode setting may be executed for 6 clocks. After restoring from the
interrupt service, to execute an instruction after setting the standby mode, insert 3 NOP instructions before the
instruction. To be sure to set the standby mode, take the necessary precautions such as clearing the interrupt request
before setting the standby mode.
(2) When crystal/ceramic oscillation is used, the EXTC bit must be cleared (0) before use. If the EXTC bit is set (1),
oscillation will stop.
(3) If the STOP mode is set when the EXTC bit of the oscillation stabilization time specification (OSTS) register is cleared
(0), the X1 pin is shorted internally to V
SS
(GND potential) to suppress clock generator leakage. Therefore, when
the STOP mode is used in a system that uses an external clock, the EXTC bit of the OSTS must be set (1). If STOP
mode setting is performed in a system to which an external clock is input when the EXTC bit of the OSTS is cleared
(0), the
m
PD784046 may suffer damage or reduced reliability.
When setting the EXTC bit of OSTS to 1, be sure to input a clock in phase reverse to that of the clock input to the
X1 pin, to the X2 pin (refer to
4.3.1 Clock oscillator
).
(4) Stop the A/D converter (by clearing (0) the AM0 and AM1 bits of the A/D converter mode register (ADM)) before
setting the STOP or IDLE mode.
(5) When the execution of the IDLE mode instruction contends with the interrupt of release source of the IDLE mode,
the STOP mode is released after the STOP mode has been executed, instead of the normal operation where the
IDLE mode is released after the IDLE mode has been executed, because of a malfunction of the
m
PD784054.
Therefore, when the IDLE mode is released, the wait operation for the oscillation stabilization time set by the
oscillation stabilization time specification register (OSTS) may be executed even though the IDLE mode is set in
software (Usually, the
m
PD784054 does not wait the oscillation stabilization time when the IDLE mode is released.)
If there are problems with waiting for the oscillation stabilization time when the IDLE mode is released, set the value
of the oscillation stabilization time set by the OSTS as short as possible.