參數(shù)資料
型號: 101-0654
廠商: Rabbit Semiconductor
文件頁數(shù): 65/110頁
文件大小: 0K
描述: INTERFACE OP6800 W/ETHERNET 512K
標(biāo)準(zhǔn)包裝: 10
系列: SBC
模塊/板類型: 單板計(jì)算機(jī)模塊
適用于相關(guān)產(chǎn)品: OP6800
54
MiniCom (OP6800)
A.3 Jumper Configurations
Figure A-4 shows the header locations used to configure the various OP6800 options via jumpers.
Figure A-4. Location of BL2100 Configurable Positions
Table A-3 lists the configuration options.
Table A-3. OP6800 Jumper Configurations
Header
Description
Pins Connected
Factory
Default
JP1
RS-485 Bias and Termination
Resistors
1–2
5–6
Bias and termination resistors
connected
×
1–3
4–6
Bias and termination resistors not
connected
*
* Although pins 1–3 and 4–6 of header JP1 are shown “jumpered” for the termination and
bias resistors not connected, pins 3 and 4 are not actually connected to anything, and this
configuration is a “parking” configuration for the jumpers so that they will be readily
available should you need to enable the termination and bias resistors in the future.
JP1
5
3
1
6
4
2
相關(guān)PDF資料
PDF描述
046232108015800 CONN FFC/FPC 8POS 1MM VERT SMD
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20-101-0463 COMPUTER SINGLE-BOARD BL2120
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