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參數(shù)資料
| 型號： | 11C91DM |
| 英文描述： | Prescaler/Frequency Divider |
| 中文描述： | 分頻器/分頻器 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 156K |
| 代理商： | 11C91DM |
ECL OperationMilitary Version
DC Electrical Characteristics
VCC e VCCA e GND VEE eb52V
Symbol
Parameter
Min
Typ
Max
Units
TA
Conditions
VOH
Output HIGH Voltage
b
1100
b
1030
b
900
b
55 C
Load e 100X to b2V
Q and Q
b
980
b
910
b
820
mV
a
25 C
b
910
b
820
b
670
a
125 C
VOL
Output LOW Voltage
b
1820
b
1705
b
1620
mV
b
55 Cto
Q and Q
a
125 C
VIH
Input HIGH Voltage
b
1190
b
905
b
55 C
Guaranteed Input HIGH
b
1095
b
810
mV
a
25 C
Signal (Note 6)
b
975
b
690
a
125 C
VIL
Input LOW Voltage
b
1890
b
1525
b
55 C
Guaranteed Input LOW
b
1850
b
1485
mV
a
25 C
Signal
b
1800
b
1435
a
125 C
IIH
Input HIGH Current
VIN e VIHA
CP Input (Note 1)
400
a
25 C
MS Input
400
m
A
a
25 C
M1 and M2 Input
250
a
25 C
IIL
Input LOW Current
05
m
A
a
25 CVIN e VILB
IEE
Power Supply Current
b
110
b
75
mA
a
25 C
Pins 6 7 13 not connected
b
119
mA
b
55 Cto
a
125 C
VEE
Operating Supply
b
57
b
52
b
47
V
b
55 Cto
Voltage Range
a
125 C
VREF
Reference Voltage
b
1550
b
1150
mV
a
25 C
VRM1 e VRM2 eb52V
IN eb100 mA
AC Electrical Characteristics
TA eb55 Cto a125 C VCC e VCCA e GND VEE eb52V
Symbol
Parameter
b
55 C
a
25 C
a
125 C
Units
Conditions
Typ
Min
Typ
Max
Typ
tPLH
Propagation Delay
15
13
20
30
ns
Output
tPHL
(50% to 50%) CP to Q
RL e 50X to b20V
tPLH
Propagation Delay
35
40
60
50
ns
(50% to 50%) MS to Q
Input
ts
Setup Time M to CP
20
40
20
ns
tri e tfi e 20 g01 ns
th
Hold Time M to CP
b
20
00
b
20
b
20
ns
(20% to 80%)
tTLH
Output Rise Time
10
20
10
ns
See
Figure 1
(20% to 80%)
tTHL
Output Fall Time
10
20
10
ns
(80% to 20%)
fMAX
Maximum Clock Frequency
AC Coupled Input 350 mV
700
600
650
600
MHz
Peak-to-Peak fMAX is
Guaranteed to be 550 MHz
Min at b55 Cto a125 C
Note 1
Conditions for testing not shown in the Table are chosen to guarantee operation under ‘‘worst case’’ conditions
Note 2
The specified limits represent the ‘‘worst case’’ value for the parameter Since these ‘‘worst case’’ values normally occur at the temperature and supply
voltage extremes additional noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges
Note 3
Typical limits are at VCC e 50V and TA ea25 C
Note 4
The M1 and M2 threshold specifications are normally referenced to the VCC potential as shown in the ECL operation tables Using VEE (GND) as the
reference as in normal TTL practice effectively makes the threshold vary directly with VCC Threshold is typically 13V below VCC (eg a37V at VCC ea5V) A
signal swing about threshold of g04V is adequate which gives the state VIH and VIL values The internal 2 kX resistors are intended to pull TTL outputs up to the
required VIH range as discussed in the Functional Description and shown in Figure 5
Note 5
TTL Output Signal swing is guaranteed at fMAX over temperature range
Note 6
M1 or M2 can be tied to VCC for fixed divide-by-ten operation
4
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