參數(shù)資料
型號： 12CE673
廠商： Microchip Technology Inc.
英文描述： HookUp/Lead Wire; Conductor Size AWG:18; No. Strands x Strand Size:65 x 36; Jacket Color:Black; Conductor Material:Copper; Jacket Material:Rubber; Leaded Process Compatible:Yes; Number of Conductors:1; Outer Diameter:0.144" RoHS Compliant: Yes
中文描述： 8引腳，8位CMOS微控制器與A / D轉(zhuǎn)換器和EEPROM數(shù)據(jù)存儲器
文件頁數(shù)： 9/116頁
文件大?。?/td> 671K
代理商： 12CE673
1998 Microchip Technology Inc.
Preliminary
DS40181B-page 9
PIC12CE67X
TABLE 3-1:
PIC12CE67X PINOUT DESCRIPTION
Name
DIP Pin
#
I/O/P
Type
Buffer
Type
Description
GP0/AN0
7
I/O
TTL/ST
Bi-directional I/O port/serial programming data/analog input
0. Can be software programmed for internal weak pull-up
and interrupt on pin change. This buffer is a Schmitt Trigger
input when used in serial programming mode.
Bi-directional I/O port/serial programming clock/analog
input 1/voltage reference. Can be software programmed for
internal weak pull-up and interrupt on pin change. This
buffer is a Schmitt Trigger input when used in serial pro-
gramming mode.
Bi-directional I/O port/analog input 2. Can be configured as
T0CKI or external interrupt.
Input port/master clear (reset) input/programming voltage
input. When configured as MCLR, this pin is an active low
reset to the device. Voltage on MCLR/V
V
DD
during normal device operation. Can be software pro-
grammed for internal weak pull-up and interrupt on pin
change. Weak pull-up always on if configured as MCLR .
This buffer is Schmitt Trigger when in MCLR mode.
Bi-directional I/O port/oscillator crystal output/analog input
3. Connections to crystal or resonator in crystal oscillator
mode (HS, XT and LP modes only, GPIO in other modes).
In EXTRC and INTRC modes, the pin output can be config-
ured to CLKOUT which has 1/4 the frequency of OSC1 and
denotes the instruction cycle rate.
Bidirectional IO port/oscillator crystal input/external clock
source input (GPIO in INTRC mode only, OSC1 in all other
oscillator modes). Schmitt trigger in EXTRC mode only.
Positive supply for logic and I/O pins
Ground reference for logic and I/O pins
GP1/AN1/V
REF
6
I/O
TTL/ST
GP2/T0CKI/AN2/INT
5
I/O
ST
GP3/MCLR/V
PP
4
I
TTL/ST
PP
must not exceed
GP4/OSC2/AN3/
CLKOUT
3
I/O
TTL
GP5/OSC1/CLKIN
2
I/O
TTL/ST
V
V
DD
1
8
P
P
—
—
SS
Legend: I = input, O = output, I/O = input/output, P = power, — = not used, TTL = TTL input,
ST = Schmitt Trigger input
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