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參數(shù)資料
| 型號： | 141540 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Monitor On-Screen Display CMOS |
| 中文描述： | 顯示器屏幕顯示的CMOS |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 186K |
| 代理商： | 141540 |
MC141540
6
MOTOROLA
REGISTERS
Display Register
CRADDR
0
1
2
3
4
5
6
7
CCS0
Bit 7 CCS0 — This bit defines a specific character color
out of the two preset colors. Color 1 is selected if this bit is
cleared, and Color 2 otherwise.
Bit 6–0 CRADDR — These seven bits address the 128
characters or symbols residing in the character ROM.
Row Control Registers
Coln 30
4
Bits 7–2 — Color 1 is determined by R1, G1, and B1; Color
2 by R2, G2, and B2.
Bit 1 CHS — This bit determines the height of a display
symbol. When it is set, the symbol is displayed in double
height.
Bit 0 CWS — Bit 0 is similar to Bit 1; when this bit is set, the
character is displayed in double width.
0
1
2
3
5
6
7
CWS
CHS
B2
G2
R2
B1
G1
R1
COLN 30
Coln 31
0
1
2
3
4
5
6
7
B4
G4
R4
B3
G3
R3
COLN 31
Bits 7–2 — Color 3 is determined by R3, G3, and B3; Color
4 by R4, G4, and B4.
Window 1 Registers
Row 10 Coln 0, 3, or 6
0
1
2
3
4
5
6
7
COLN 0,
3, or 6
ROW 10
Row 10 Coln 1, 4, or 7
WEN
CCS1
COL START ADDR
MSB
4, or 7
0
1
2
3
4
5
6
7
COLN 1,
Bit 2 WEN — This bit enables the background Window 1
generation when it is set.
Bit 1 CCS1 — This additional color select bit provides the
characters residing within Window 1 with two extra color
selections, making a total of four selections for that row.
Row 10 Coln 2, 5, or 8
4
5
6
R
G
COL END ADDR
COLN 2,
5, or 8
0
1
2
3
7
B
ROW 10
Window 1 occupies Columns 0–2 of Row 10; Window 2
occupies Columns 3–5; and Window 3 occupies Columns
6–8. Window 1 has the highest priority, and Window 3 the
least. If window overlapping occurs, the higher priority win-
dow will cover the lower one, and the higher priority color will
take over on the overlap window area. If the start address is
greater than the end address, this window will not be dis-
played.
Frame Control Registers
Coln 9
MSB
LSB
COLN 9
Bit 7–0 VERTD — These six bits define the vertical starting
position. There are a total of 64 steps, with an increment of
four horizontal lines per step for each field. The value cannot
be zero anytime, and the default value is 4.
Coln 10
Bit 6–0 HORD — These bits define the horizontal starting
position for character display. Five bits give a total of 32
steps and each increment represents a five–dot shift to the
right on the monitor screen. The value cannot be zero any-
time, and the default value is 5.
0
1
2
3
4
5
6
7
LSB
COLN 10
MSB
Coln 11
COLN 11
Bit 5–0 CH5–CH0 — These six bits determine the dis-
played character height. It is possible to have a proper char-
acter height by setting a value greater than or equal to 16 on
a different horizontal frequency monitor. Setting a value be-
low 16 will not have a predictable result. Figure 6 illustrates
how this chip expands the built–in character font to the de-
sired height.
Coln 12
7
COLN 12
4
3
2
1
Bit 7 OSD_EN — The OSD circuit is activated when this bit
is set.
Bit 6 BSEN — This bit enables the character bordering or
shadowing function when it is set.
Bit 5 SHADOW — Characters with black–edge shadowing
are selected if this bit is set; otherwise bordering prevails.
Bit 0 FBKGC — Bit 0 determines the configuration of the
FBKG output pin. When it is clear, the FBKG pin outputs high
while displaying characters or windows; otherwise, the
FBKG pin outputs high only while displaying characters.
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