參數(shù)資料
型號(hào): 2032E
廠商: Lattice Semiconductor Corporation
英文描述: In-System Programmable SuperFAST⑩ High Density PLD
中文描述: 在系統(tǒng)可編程超快⑩高密度可編程邏輯器件
文件頁(yè)數(shù): 10/14頁(yè)
文件大?。?/td> 173K
代理商: 2032E
Specifications
ispLSI 2032E
10
Power consumption in the ispLSI 2032E device depends
on two primary factors: the speed at which the device is
operating and the number of Product Terms used.
Figure 3 shows the relationship between power and
operating speed.
Figure 3. Typical Device Power Consumption vs fmax
Power Consumption
0127A/2032E
I
CC
can be estimated for the ispLSI 2032E using the following equation:
For 2032E-225 and -200: ICC = 4.5 + (# of PTs * 1.3) + (# of nets * Max freq * 0.0035)
For 2032E-180 and Slower: ICC = 4.5 + (# of PTs * 1.02) + (# of nets * Max freq * 0.0035)
Where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
The I
CC
estimate is based on typical conditions (V
CC
= 5.0V, room temperature) and an assumption of two GLB
loads on average exists. These values are for estimates only. Since the value of I
CC
is sensitive to operating
conditions and the program in the device, the actual I
CC
should be verified.
60
80
100
1
20
40
60
80
100 120 140 160 180
f
max (MHz)
200 220 240
I
C
Notes: Configuration of two 16-bit counters
Typical current at 5V, 25
°
C
90
70
40
50
110
120
130
140
150
ispLSI 2032E-225 and -200
ispLSI 2032E-180
and Slower
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