參數(shù)資料
型號(hào): 203N
廠商: Fairchild Semiconductor Corporation
英文描述: N-Channel 2.5V Specified PowerTrench BGA MOSFET
中文描述: N溝道2.5V的指定的PowerTrench MOSFET的BGA封裝
文件頁(yè)數(shù): 2/6頁(yè)
文件大?。?/td> 144K
代理商: 203N
FDZ203N Rev.E6(W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Test Conditions
Symbol
Parameter
Min
Typ Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage V
GS
= 0 V, I
D
= 250
μ
A
BV
DSS
T
J
Coefficient
I
DSS
Zero Gate Voltage Drain Current
I
GSSF
Gate–Body Leakage, Forward
I
GSSR
Gate–Body Leakage, Reverse
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
GS(th)
T
J
Temperature Coefficient
R
DS(on)
Static Drain–Source
On–Resistance
20
V
Breakdown Voltage Temperature
I
D
= 250
μ
A, Referenced to 25
°
C
14
mV/
°
C
V
DS
= 16 V,
V
GS
= 12 V,
V
GS
= –12 V,
V
GS
= 0 V
V
DS
= 0 V
V
DS
= 0 V
1
μ
A
nA
nA
100
–100
(Note 2)
V
DS
= V
GS
, I
D
= 250
μ
A
I
D
= 250
μ
A, Referenced to 25
°
C
V
GS
= 4.5 V,
V
GS
= 2.5 V,
V
GS
= 4.5 V, I
D
= 7.5 A, T
J
=125
°
C
V
GS
= 4.5 V,
V
DS
= 5 V
V
DS
= 10 V,
I
D
= 7.5 A
0.6
0.8
–3
1.5
V
Gate Threshold Voltage
mV/
°
C
I
D
= 7.5 A
I
D
= 5.5 A
14
20
20
18
30
28
m
I
D(on)
g
FS
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
V
SD
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
On–State Drain Current
Forward Transconductance
20
A
S
33
1127
268
134
pF
pF
pF
V
DS
= 10 V,
f = 1.0 MHz
V
GS
= 0 V,
8
11
26
8
11
2
3
16
20
42
16
15
ns
ns
ns
ns
nC
nC
nC
V
DD
= 10V,
V
GS
= 4.5 V,
I
D
= 1 A,
R
GEN
= 6
V
DS
= 10 V,
V
GS
= 4.5 V
I
D
= 7.5 A,
1.3
1.2
A
V
V
GS
= 0 V,
I
S
= 1.3 A
(Note 2)
0.7
20
14
nS
nC
I
F
= 9A,
d
iF
/d
t
= 100 A/μs
Notes:
1.
R
is determined with the device mounted on a 1 in2 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the junction to
the circuit board side of the solder ball, R
θ
JB
, is defined for reference. For R
θ
JC
, the thermal reference point for the case is defined as the top surface of the
copper chip carrier. R
θ
JC
and R
θ
JB
are guaranteed by design while R
θ
JA
is determined by the user's board design.
a)
67 °C/W when
mounted on a 1in
2
pad
of 2 oz copper, 1.5” x
1.5” x 0.062” thick
PCB
b)
155 °C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. 2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
F
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