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| 型號(hào)： | 22368 |
| 英文描述： | Home Networking Board Design Using PCnet-Home Devices? - (PDF) |
| 中文描述： | 家庭網(wǎng)絡(luò)電路板設(shè)計(jì)使用PCnet家用裝置？ - （PDF格式） |
| 文件頁(yè)數(shù)： | 3/14頁(yè) |
| 文件大小： | 275K |
| 代理商： | 22368 |
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2
Home Networking Board Design Using PCnet-Home Devices
Board Design Features
The Am79C978/Am79C978A PCnet-Home devices
have the following features:
Integrated 1 Mbps HomePNA PHY, 10BASE-T
PHY, and 10/100 Mbps MAC
Integrated magnetics with HomePNA bandpass fil-
ter and power surge protection against lightning
EEPROM for subvendor and subsystem ID, as well
as a 48-bit MAC address
Magic Packet
interfaced to motherboards sup-
porting remote wake-up LAN
Lowpass filter to prevent noise from the phone or
G.lite to the HomePNA line
NetPHY
-1LP (10/100 PHY) interface
Two RJ-11s (one for HomePNA port or one for
Phone/G.lite) and one RJ-45 for Ethernet port
LEDs for Link, Activity, Speed, and Collision
Glueless PCI 2.1 compliant interface
PCI power management support
PC98/PC99 compliance
Device Placement And Routing
The adapter card design in the appendix shows the op-
timized placement of the components (see layout plot).
The pin location for the Am79C978/Am79C978A de-
vices have been chosen to allow for minimum length
signal routing. Short signal traces reduce the capaci-
tive loading caused by the signal trace and noise from
adjacent signals. Care should be given to avoid the
routing of digital signals across the analog boundaries
Since there is minimum filtering on the secondary side
of the transformer, it is also recommended that inte-
grated magnetics are placed near the PCI bracket
(next to the RJ-11) to prevent any EMI noise issue. See
the appendix for PCB layout and placement.
Figure 2.
Typical Linear Regulator
Implementation
POWER SUPPLY
AMD
’
s PCnet-Home devices operate from a +3.3 V
±300 mV power supply. Some PCI systems do not have
an available +3.3 V supply. The easiest way to convert
from a +5 V supply to a +3.3 V supply is through the use
of a linear regulator. See Figure 2. Converting from a
+12 V supply to a +3.3 V supply is not recommended
due to the additional power dissipation.
In addition, for optimal small signal receive sensitivity
performance, a linear regulator should be used. The
advantage of a linear regulator is that it provides a very
quiet output, isolated from the noise on the +5 V digital
supply from the PCI bus. Since small signal receive
performance is sensitive to power supply noise, the
clean outputs of the linear regulator contribute to im-
proved receive performance.
Bypass Capacitors
Great care should be given to the power distribution
and decoupling of specific Am79C978/Am79C978A
power pins. Poor power decoupling on these pins can
cause degradation of the HomePNA small signal re-
ceive sensitivity by as much as 5 mV.
Bypass capacitors are more effective when located
close to VDD and VSS pins of the chip. See Table 1
for pins that require bypass. In the case of a 4-layer
PCB design, it is recommended that each VDD and
VSS pin be supplied from their own vias. The pre-
ferred method for the layout of the bypass capacitors
is shown in Figure 3.
Voltage Regulator
LM3940IMP-3.3
V
IN
GND V
OUT
PCI +5 VCC
+3 VR
10 μF
10 μF
0.1 μF
22368A-2
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