Home Networking Board Design Using PCnet-Home Devices
5
HomePNA Only Mode (No 10BASE-T Port
Connected)
If the internal 10BASE-T port is not utilized, appro-
priate 10BASE-T output signals (TX± and RX±)
should be resistively terminated. See Figure 5 for
more details. This termination helps to reduce the
noise injected by the Ethernet link pulse back into
the HomePNA analog section. In addition, only
HomePNA magnetics should be used to prevent in-
terference from the floating 10BASE-T magnetic
section (if both 10BASE-T/HomePNA magnetics
are used).
Figure 5.
Recommended Termination for
HomePNA Only Mode
PCB LAYOUT RECOMMENDATION
The following are some general guidelines that will en-
sure success of the PCnet-Home design:
Component placement should be carefully con-
sidered in order to optimize and shorten the
routing traces.
Keep the bypass capacitors as close as possible
to the power pins, and provide enough capacitors
for the analog power pins. A good rule of thumb is
to have a 0.1
μ
F capacitor for each analog power
pin. See Table 1 for more details.
Differential signal pairs from the chip side to the
magnetic side, such as TX/RX for 10BASE-T,
HRTRXP and HRTRXN for HomePNA, should be
maintained identically (i.e., equal length and on
the same side of the PCB to minimize imped-
ance mismatch) between the routing pairs. A 10-
15 mil trace thickness is recommended with an
8-10 mil space to maintain a 50-
impedance
of the signal pair.
Keep digital signals or other signals away from
the differential signals that might introduce noise
to the differential pairs.
Keep the 20-MHz clock source away from the
HomePNA differential output pair to prevent any
coupling to the differential pair.
Do not separate digital and analog ground planes if
a 4-layer board is designed. Keep them the same to
maintain the same current return path.
EMI and FCC
Since the PCnet-Home port utilizes the telephone or
Ethernet cable, careful design techniques must be con-
sidered in order to ensure successful first-pass FCC re-
quirements, Part 68 and Class B.
Note:
For Part 68, not all telecommunication require-
ments need to be tested since the PCnet-Home only
transfers data and has no voice support like a modem.
Consult with your FCC testing house for more details.
When routing the HomePNA pair with magnetics
close to the RJ-11 port, follow Part 68 requirements
i.e., there should be no power plane around the
area and all tip and ring traces must have enough
clearance (at least 50 mils) to isolate potential
power surges.
Keep the AC ground return paths close to the signal
paths. In AMD
’
s design, there is the same ground,
i.e., no separate analog or digital ground planes.
Isolated planes, if any (i.e., +5 V to +3.3 V plane),
should be avoided by capacitively coupling the
planes together to prevent any discontinuities
and provide a signal return path across the iso-
lated planes. The cap used to tie the +3.3 V and
+5 V planes together should be a good bypass
cap (.01
μ
F or.1
μ
F), and it should be placed
close to the center point of the signals that cross
the boundary or on each side of the group.
The chassis ground plane that is connected to the
bracket should be isolated from the signal plane to
prevent any radiation from leaking through and
causing FCC failure.
Additional information about PCB layout and how to re-
duce EMI may be found at:
http://www.amd.com/
products/npd/techdocs/techdocs.html
.
CONCLUSION
Following the guidelines described in this document
will help ensure that customers designing with PCnet-
Home devices experience first-pass success. Contact
your local AMD FAEs and SAEs for samples, schemat-
ics, and PCB layout reviews.
1 K
2 K
+3.3 VR
25
102
Am79C978
RX-
RX+
50
Ring
Tip
50
TX+
TX-
HR+
HR-
HR+
HR-
CTAP
HomePNA
Magnetic
RJ-11
22368A-5