參數(shù)資料
型號： 24FC256
英文描述： 24AA256/LC256/FC256 Datasheet
中文描述： 24AA256/LC256/FC256數(shù)據(jù)表
文件頁數(shù)： 8/28頁
文件大?。?/td> 449K
代理商： 24FC256
24AA256/24LC256/24FC256
DS21203L-page 8
2003 Microchip Technology Inc.
5.0
DEVICE ADDRESSING
A control byte is the first byte received following the
Start condition from the master device (Figure 5-1).
The control byte consists of a 4-bit control code. For the
24XX256, this is set as ‘
1010
’
binary for read and write
operations. The next three bits of the control byte are
the Chip Select bits (A2, A1, A0). The Chip Select bits
allow the use of up to eight 24XX256 devices on the
same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
are, in effect, the three Most Significant bits of the word
address.
For the MSOP package, the A0 and A1 pins are not
connected. During device addressing, the A0 and A1
Chip Select bits (Figures 5-1 and 5-2) should be set to
‘
0
’. Only two 24XX256 MSOP packages can be
connected to the same bus.
The last bit of the control byte defines the operation to
be performed. When set to a one, a read operation is
selected. When set to a zero, a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 5-2). Because
only A14…A0 are used, the upper address bits are a
don’t care. The upper address bits are transferred first,
followed by the less significant bits.
Following the Start condition, the 24XX256 monitors
the SDA bus checking the device type identifier being
transmitted. Upon receiving a ‘
1010
’
code and appro-
priate device select bits, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX256 will select a read or
write operation.
FIGURE 5-1:
CONTROL BYTE
FORMAT
5.1
Contiguous Addressing Across
Multiple Devices
The Chip Select bits A2, A1, A0 can be used to expand
the contiguous address space for up to 2 Mbit by
adding up to eight 24XX256s on the same bus. In this
case, software can use A0 of the
control byte
as
address bit A15; A1 as address bit A16; and A2 as
address bit A17. It is not possible to sequentially read
across device boundaries.
For the MSOP package, up to two 24XX256 devices
can be added for up to 512 Kbit of address space. In
this case, software can use A2 of the control byte as
address bit A17. Bits A0 (A15) and A1 (A16) of the
control byte
must always be set to a logic ‘
0
’ for the
MSOP.
FIGURE 5-2:
ADDRESS SEQUENCE BIT ASSIGNMENTS
1
0
1
0
A2
A1
A0
S
ACK
R/W
Control Code
Chip Select
Bits
Slave Address
Acknowledge Bit
Start Bit
Read/Write Bit
1
0
1
0
A
2
A
1
A
X
A
11
A
10
A
9
A
7
A
0
A
8
A
12
CONTROL BYTE
ADDRESS HIGH BYTE
ADDRESS LOW BYTE
CONTROL
CODE
CHIP
SELECT
BITS
X = Don’t Care Bit
A
13
A
14
相關(guān)PDF資料
PDF描述
24FC32 32K 5.0V 1 MHz I 2 C Smart Serial EEPROM
24FC32-IP 32K 5.0V 1 MHz I 2 C Smart Serial EEPROM
24FC32-ISM 32K 5.0V 1 MHz I 2 C Smart Serial EEPROM
24FC32-P 32K 5.0V 1 MHz I 2 C Smart Serial EEPROM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
24FC256/S15K 制造商:Microchip Technology Inc 功能描述:256K, 32K X 8, 2.5V HI-SPEED S - Gel-pak, waffle pack, wafer, diced wafer on film
24FC256/W15K 制造商:Microchip Technology Inc 功能描述:256K, 32K X 8, 2.5V HI-SPEED S - Gel-pak, waffle pack, wafer, diced wafer on film
24FC256/WF15K 制造商:Microchip Technology Inc 功能描述:256K, 32K X 8, 2.5V HI-SPEED S - Gel-pak, waffle pack, wafer, diced wafer on film
24FC256E/MF 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:256K I2C CMOS Serial EEPROM
24FC256-E/MF 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:256K I2C CMOS Serial EEPROM
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