參數(shù)資料
型號(hào): 24LC00
廠商: Microchip Technology Inc.
英文描述: 128 Bit IIC Bus Serial EEPROMs(2.5~6V,128位,IIC總線串行EEPROM)
中文描述: 128位IIC總線(2.5?6V的,128位,進(jìn)口證總線串行EEPROM的串行EEPROM)
文件頁(yè)數(shù): 5/12頁(yè)
文件大?。?/td> 182K
代理商: 24LC00
24xx00
1996 Microchip Technology Inc.
DS21178B-page 5
FIGURE 4-1:
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
FIGURE 4-2:
ACKNOWLEDGE TIMING
5.0
DEVICE ADDRESSING
After generating a START condition, the bus master
transmits a control byte consisting of a slave address
and a Read/Write bit that indicates what type of opera-
tion is to be performed. The slave address for the
24xx00 consists of a 4-bit device code (1010) followed
by three don't care bits.
The last bit of the control byte determines the operation
to be performed. When set to a one a read operation is
selected, and when set to a zero a write operation is
selected. (Figure 5-1). The 24xx00 monitors the bus for
its corresponding slave address all the time. It gener-
ates an acknowledge bit if the slave address was true
and it is not in a programming mode.
FIGURE 5-1:
CONTROL BYTE FORMAT
(A)
(B)
(C)
(D)
(A)
(C)
SCL
SDA
START
CONDITION
ADDRESS OR
ACKNOWLEDGE
VALID
DATA
ALLOWED
TO CHANGE
STOP
CONDITION
SCL
9
8
7
6
5
4
3
2
1
1
2
3
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
Receiver must release the SDA line at this point
so the Transmitter can continue sending data.
Data from transmitter
Data from transmitter
SDA
Acknowledge
Bit
1
0
1
0
X
X
X
S
ACK
R/W
Device Select
Bits
Don’t Care
Bits
Slave Address
Acknowledge Bit
Start Bit
Read/Write Bit
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參數(shù)描述
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24LC00-/P 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K/2K Software Addressable I2C⑩ Serial EEPROM
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