參數(shù)資料
型號(hào): 24LC256-IT/MS
元件分類: PROM
英文描述: 32K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
封裝: ROHS COMPLIANT, PLASTIC, MSOP-8
文件頁數(shù): 5/42頁
文件大小: 797K
代理商: 24LC256-IT/MS
2007 Microchip Technology Inc.
DS21930C-page 13
24AAXX/24LCXX/24FCXX
5.6
Device Addressing For Devices
Without Functional Address Pins
A control byte is the first byte received following the
Start condition from the master device (Figure 5-3).
The control byte begins with a four-bit control code. For
the 24XX, this is set as ‘1010
binary for read and write
operations. The next three bits of the control byte are
the block-select bits (B2, B1, B0). They are used by the
master device to select which of the 256-word blocks of
memory are to be accessed. These bits are in effect the
three Most Significant bits of the word address. Note
that B2, B1 and B0 are “don’t care” for the 24XX00, the
24XX01 and 24XX02. B2 and B1 are “don’t care” for
the 24XX04. B2 is “don’t care” for the 24XX08.
The last bit of the control byte defines the operation to
be performed. When set to ‘1’, a read operation is
selected. When set to ‘0’ a write operation is selected.
Following the Start condition, the 24XX monitors the
SDA bus. Upon receiving a ‘1010
code, the block
select bits and the R/W bit, the slave device outputs an
Acknowledge signal on the SDA line. The address byte
follows the acknowledge.
FIGURE 5-3:
CONTROL AND ADDRESS BYTE ASSIGNMENTS FOR
DEVICES WITHOUT ADDRESS PINS
S
10
1
0
x
R/W
ACK
S
10
1
0
x
R/W
ACK
S
10
1
0
x
R/W
ACK
S
10
1
0
x
B0
R/W
ACK
S
10
1
0
x
B1 B0
R/W
ACK
S
10
1
0
B2 B1 B0
R/W
ACK
24XX01
24XX02
24XX04
24XX08
24XX016
x
= “don’t care” bit
Acknowledge
Control Code
Start bit
Control Byte
Block Select bits
Address Byte
24XX00
Read/Write bit (Read = 1, Write = 0)
xx
x
A3
.
A0
x
A6
.
A0
A7
.
A0
A7
.
A0
A7
.
A0
A7
.
A0
bit
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