參數(shù)資料
型號: 24LC41A
英文描述: High-Speed Secure Microcontroller
中文描述: 24LC41A數(shù)據(jù)表
文件頁數(shù): 8/18頁
文件大?。?/td> 244K
代理商: 24LC41A
24LC41A
DS21176D-page 8
2003 Microchip Technology Inc.
FIGURE 3-1:
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
FIGURE 3-2:
BUS TIMING START/STOP
FIGURE 3-3:
BUS TIMING DATA
T
F
FIGURE 3-4:
CONTROL BYTE ALLOCATION
DSCL
or
MSCL
DSDA
or
MSDA
(
A
)
(B)
(D)
(D)
(C)
(
A
)
START
CONDITION
ADDRESS OR
ACKNOWLEDGE
VALID
DATA
ALLOWED
TO CHANGE
STOP
CONDITION
MSCL
or
MSCL
IN
DSDA
or
MSDA
IN
T
SU
:
STA
T
HD
:
STA
START
STOP
V
HYS
T
SU
:
STO
DSCL
or
MSCL
IN
DSDA
OR
MSDA
IN
DSDA
OR
MSDA
OUT
T
HD
:
STA
T
SU
:
STA
T
HIGH
T
R
T
SU
:
STO
T
SU
:
DAT
T
HD
:
DAT
T
BUF
T
AA
T
HD
:
STA
T
AA
T
SP
T
LOW
B0, B1, and B2 are zeros for DDC Monitor Port. B1 and B2 are don’t care bits for the Microcontroller Access Port,
and B0 is used to select which of the two 256 word blocks of memory are to be accessed.
R/W
A
1
0
1
0
B2
B1
B0
READ/WRITE
START
SLAVE ADDRESS
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