參數(shù)資料
型號: 24LC41A
廠商: Microchip Technology Inc.
英文描述: 1K/4K 2.5V Dual Mode, Dual Port IIC Serial EEPROM(1K/4K位,雙模式雙端口,EEPROM)
中文描述: 1K/4K 2.5V的雙模式,雙端口串行EEPROM國際進口證(1K/4K位,雙模式雙端口器,EEPROM)
文件頁數(shù): 10/16頁
文件大?。?/td> 106K
代理商: 24LC41A
24LC41A
DS21176A-page 10
Preliminary
1996 Microchip Technology Inc.
FIGURE 4-2:
PAGE WRITE
FIGURE 4-3: VCLK WRITE ENABLE TIMING
S
P
BUS ACTIVITY
MASTER
DSDA or
MSDA LINE
BUS ACTIVITY
S
T
A
R
T
S
T
O
P
CONTROL
BYTE
WORD
ADDRESS (n)
DATA n
DATAn + 7
DATAn + 1
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
VCLK
SCL
SDA
IN
VCLK
T
VHST
T
SPVL
T
HD
:
STA
T
SU
:
STO
5.0
ACKNOWLEDGE POLLING
Acknowledge polling can be done for both the DDC
Monitor Port (when in Bi-directional Mode) and the
Microcontroller Access Port.
Since the port will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize but
throughput). Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master send-
ing a start condition followed by the control byte for a
write command (R/W=0). If the device is still busy with
the write cycle, then no ACK will be returned. If the
cycle is complete, then the device will return the ACK
and the master can then proceed with the next read or
write command. See Figure 5-1 for the flow diagram.
FIGURE 5-1:
ACKNOWLEDGE POLLING
FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)
Next
Operation
NO
YES
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參數(shù)描述
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