參數(shù)資料
型號: 25759
英文描述: Revision Guide for AMD Athlon 64? and AMD Opteron? Processors
中文描述: 修訂指南的AMD Athlon 64?和AMD Opteron?處理器
文件頁數(shù): 33/49頁
文件大?。?/td> 287K
代理商: 25759
Product Errata
33
Revision Guide for AMD Athlon 64 and AMD Opteron Processors
25759
Rev. 3.09
September 2003
82 Certain Faults On Far Transfer Instructions In 64-Bit Mode Save
Incorrect RIP
Description
This erratum affects the far transfer instructions (CALLF, RETF, IRET, JMPF) in 64-bit mode. If a far
transfer is executed in 64-bit mode and:
The RIP of the far transfer is 4 GB or greater (> 32 bits)
The target is a 32-bit compatibility segment
The far transfer encounters a fault _after_ loading the CS
then the RIP pushed onto the exception handler stack will be erroneously truncated to 32-bits. The
following table lists the instructions and faults that are subject to this erratum.
Potential Effect on System
The fault handler will return to the incorrect address if it attempts to IRET back to the faulting
instruction (the far transfer), leading to unpredictable system failures.
Suggested Workaround
None required. This erratum can only affect 64-bit operating systems, but has never been seen in such
systems. It has only been seen in random instruction testing.
This erratum can only affect kernel operating system code, not applications since transfers from 64-
bit mode to 32-bit compatibility can only be done by the kernel. Furthermore, existing 64-bit
operating systems provide enough error checking and are constructed such that it is not possible to
encounter one of the above faults at the point the kernel uses the far transfers to exit to a 32-bit
compatibility application.
Fix Planned
Yes
Instruction
Fault
CALLF (intersegment, no gate)
Target limit violation
Faults on stack pushes
JMPF (intersegment, no gate)
Target limit violation
RETF/IRET (no CPL change)
Target limit violation
RETF/IRET (with CPL change)
Target limit violation
Fault while loading new SS
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