參數(shù)資料
型號: 25LC128
廠商: Microchip Technology Inc.
英文描述: 128K 5.0V SPI Bus Serial EEPROM(2.5~5.5V,128K位,SPI總線串行EEPROM)
中文描述: 128K的5.0V SPI總線串行EEPROM(2.5?5.5V的,128K的位和SPI總線串行EEPROM的)
文件頁數(shù): 132/170頁
文件大小: 4191K
代理商: 25LC128
PIC16F62X
DS40300C-page 130
Preliminary
2003 Microchip Technology Inc.
17.1
DC Characteristics:PIC16F62X-04 (Commercial, Industrial, Extended)
PIC16F62X-20 (Commercial, Industrial, Extended)
PIC16LF62X-04 (Commercial, Industrial)
PIC16LF62X-04
(Commercial, Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40
°
C
Ta
+85
°
C for industrial and
0
°
C
Ta
+70
°
C for commercial
PIC16F62X-04
PIC16F62X-20
(Commercial, Industrial, Extended)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40
°
C
Ta
+85
°
C for industrial and
0
°
C
Ta
+70
°
C for commercial and
-40
°
C
Ta
+125
°
C for extended
Param
No.
Sym
Characteristic/Device
Min
Typ
Max
Units
Conditions
V
DD
Supply Voltage
D001
PIC16LF62X
2.0
5.5
V
D001
PIC16F62X
3.0
5.5
V
D002
V
DR
RAM Data Retention
Voltage
(1)
1.5
V
Device in SLEEP mode*
D003
V
POR
V
DD
Start Voltage
to ensure Power-on Reset
V
SS
V
See section on Power-on Reset
for details
D004
S
VDD
V
DD
Rise Rate
to ensure Power-on Reset
0.05
V/ms
See section on Power-on Reset
for details*
D005
V
BOD
Brown-out Detect Voltage
3.65
3.65
4.0
4.35
4.4
V
V
BODEN configuration bit is set
BODEN configuration bit is set,
Extended
D010
D013
I
DD
Supply Current
(2), (5)
PIC16LF62X
0.30
1.10
4.0
3.80
20
0.6
2.0
7.0
6.0
2.0
30
mA
mA
mA
mA
mA
μ
A
Fosc = 4.0 MHz, V
DD
= 2.0
(5)
F
OSC
= 4.0 MHz, V
DD
= 5.5*
Fosc = 20.0 MHz, V
DD
= 5.5
Fosc = 20.0 MHz, V
DD
= 4.5*
F
OSC
= 10.0 MHz, V
DD
= 3.0
(6)
F
OSC
= 32 kHz, V
DD
= 2.0
D010
D013
D014
PIC16F62X
0.60
1.10
4.0
3.80
20
0.7
2.0
7.0
6.0
2.0
30
mA
mA
mA
mA
mA
μ
A
Fosc = 4.0 MHz, V
DD
= 3.0
Fosc = 4.0 MHz, V
DD
= 5.5*
F
OSC
= 20.0 MHz, V
DD
= 5.5
F
OSC
= 20.0 MHz, V
DD
= 4.5*
F
OSC
= 10.0 MHz, V
DD
= 3.0*
(6)
F
OSC
= 32 kHz, V
DD
= 3.0*
Legend: Rows with standard voltage device data only are shaded for improved readability.
*
These parameters are characterized but not tested.
Data in “Typ” column is at 5.0V, 25
°
C, unless otherwise stated. These parameters are for design guidance only and are
not tested.
Note
1:
This is the limit to which V
DD
can be lowered in SLEEP mode without losing RAM data.
2:
The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and
switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current con-
sumption.
The test conditions for all I
DD
measurements in active Operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tri-stated, pulled to V
DD
,
MCLR = V
DD
; WDT enabled/disabled as specified.
3:
The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is measured with
the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to V
DD
or V
SS
.
4:
The
current is the additional current consumed when this peripheral is enabled. This current should be added to the
base I
DD
or I
PD
measurement.
5:
For RC osc configuration, current through R
EXT
is not included. The current through the resistor can be estimated by the
formula Ir = V
DD
/2R
EXT
(mA) with R
EXT
in k
.
6:
Commercial temperature only.
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