參數(shù)資料
型號(hào): 27C256-12L
廠商: Microchip Technology Inc.
英文描述: 256K (32K x 8) CMOS EPROM
中文描述: 256K(32K的× 8)的CMOS存儲(chǔ)器
文件頁(yè)數(shù): 3/12頁(yè)
文件大小: 67K
代理商: 27C256-12L
1996 Microchip Technology Inc.
DS11001L-page 3
27C256
TABLE 1-3:
READ OPERATION AC CHARACTERISTICS
FIGURE 1-1:
READ WAVEFORMS
AC Testing Waveform:
Output Load:
Input Rise and Fall Times: 10 ns
Ambient Temperature:
V
1 TTL Load + 100 pF
IH
= 2.4V and V
IL
= 0.45V; V
OH
= 2.0V V
OL
= 0.8V
Commercial:
Industrial:
Automotive:
Tamb = 0C to +70C
Tamb = -40C to +85C
Tamb = -40
°
C to +125
°
C
Parameter
Sym
27C256-90* 27C256-10* 27C256-12 27C256-15 27C256-20
Units
Conditions
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Address to Output
Delay
t
ACC
90
100
120
150
200
ns
CE=OE =V
IL
CE to Output Delay
t
CE
90
100
120
150
200
ns
OE = V
IL
OE to Output Delay
t
OE
40
45
55
65
75
ns
CE = V
IL
CE or OE to O/P
High Impedance
t
OFF
0
30
0
30
0
35
0
50
0
55
ns
Output Hold from
Address CE or OE,
whichever goes first
t
OH
0
0
0
0
0
ns
* -10, -90 AC Testing Waveform: V
Output Load: 1 TTL Load + 30pF
IH
= 2.4V and V
IL
= .45V; V
OH
= 1.5V and V
OL
= 1.5V
Address
CE
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
OE
Outputs
O0 - O7
V
OH
V
OL
Address Valid
t
CE(2)
t
OE(2)
High Z
Valid Output
t
ACC
(1) t
OFF
is specified for OE or CE, whichever occurs first
(2) OE may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
(3) This parameter is sampled and is not 100% tested.
High Z
t
OH
t
OFF(1,3)
Notes:
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