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4.0 Segmentation Coprocessor
4.3 Segmentation Data Structures
RS8234
Datasheet for RS8234 xBR ServiceSAR
N8234DS1B
4.3.4.2 Transmit Queue
Management
The transmit queues reside in a single continuous section of SAR shared memory.
During initialization the Host configures the number of entries per queue with the
SEG_CTRL(TR_SIZE) field. The size ranges from 64 to 4096 entries per queue.
The
Host
also
selects
a
priority
scheme
at
initialization
with
the
SEG_CTRL(TX_RND) bit. Both of these fields are static configurations and
must not be changed during runtime operation.
By initializing the SEG_TXBASE register, the Host determines the base
address of all active transmit queues. This register contains the base address of the
first queue, the number of active queues, and the write-only update interval for all
queues. A set of other internal registers, the Transmit Queue Base Table entries,
track the current state of the queues. Table 4-16 and Table 4-17 below describe the
fields of these queues.
The byte address of any transmit queue entry is given by:
(SEG_TXBASE(SEG_TXB)*128)
+ <transmit queue number> * <decoded TQ_SIZE value>
+ <entry number>*4
The Host manages each transmit queue as an independent write-only control
queue. Chapter 3.0 describes the runtime management of a write-only control
queue. The transmit queue base table contains all of the queue control variables
except for INTERVAL, which is located in the SEG_TXBASE register.
Table 4-15. Transmit Queue Entry Field Descriptions
Field Name
Description
VLD
0 - Entry invalid. Waiting for the host to submit new data for segmentation.
1 - Entry valid. The SAR will process the entry when its read pointer into the queue advances to
this entry.
Written to one by the host when submitting a new entry. The SAR clears this bit to zero when it
has successfully linked the buffer descriptor chain to the VCC Table.
LINK_HEAD
0 - The RS8234 links the new descriptor chain at the end of the existing chain on the VCC.
1 - The RS8234 links the new descriptor chain at the head of the existing chain.
If this bit is set, the buffer must contain data for at least one cell. Only a single buffer descriptor
may be linked to a transmit queue entry when this bit is set.
This bit is intended for use with the buffer descriptor SINGLE option to send in line management
cells with reduced latency.
NOTE: It is mandatory that the SINGLE option is set in the buffer descriptor for any Tx Queue
entry with LINK_HEAD set. To do otherwise may result in corrupted seg data.
FIND_CHAIN
Indicates the SAR is searching for the end of the buffer descriptor chain.
The host always writes this bit to zero.
SEG_BD_PNTR
Points to the first buffer descriptor in the new buffer descriptor chain. Bits 22:2 of the address are
specified; the two least significant bits of the pointer are assumed to be zero (word-aligned).