參數(shù)資料
型號(hào)： 28F008SA
廠商： Intel Corp.
英文描述： 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY
中文描述： 8兆（1兆位× 8）FlashFileTM記憶
文件頁(yè)數(shù)： 16/49頁(yè)
文件大?。?/td> 408K
代理商： 28F008SA
SMART 3 ADVANCED BOOT BLOCK
–BYTE-WIDE
E
16
PRELIMINARY
reached using the commands summarized in Table
4. A comprehensive chart showing the state
transitions is in Appendix B.
3.2.1
READ ARRAY
When RP# transitions from V
IL
(reset) to V
IH
, the
device will be in the read array mode and will
respond to the read control inputs (CE#, address
inputs, and OE#) without any commands being
written to the CUI.
When the device is in the read array mode, four
control signals must be controlled to obtain data at
the outputs.
WE# must be logic high (V
IH
)
CE# must be logic low (V
IL
)
OE# must be logic low (V
IL
)
RP# must be logic high (V
IH
)
In addition, the address of the desired location must
be applied to the address pins.
If the device is not in read array mode, as would be
the case after a program or erase operation, the
Read Array command (FFH) must be written to the
CUI before array reads can take place.
Table 4. Command Codes and Descriptions
Code
Device Mode
Description
00
Invalid/
Reserved
Unassigned commands that should not be used. Intel reserves the right to
redefine these codes for future functions.
FF
Read Array
Places the device in read array mode, such that array data will be output on the
data pins.
40
Program
Set-Up
This is a two-cycle command. The first cycle prepares the CUI for a program
operation. The second cycle latches addresses and data information and
initiates the WSM to execute the Program algorithm. The flash outputs status
register data when CE# or OE# is toggled. A Read Array command is required
after programming to read array data. See Section 3.2.4.
10
Alternate
Program Set-Up
(See 40H/Program Set-Up)
20
Erase
Set-Up
Prepares the CUI for the Erase Confirm command. If the next command is not
an Erase Confirm command, then the CUI will (a) set both SR.4 and SR.5 of the
status register to a
“1,” (b) place the device into the read status register mode,
and (c) wait for another command. See Section 3.2.5.
D0
Program
Resume
Erase Resume/
Erase Confirm
If the previous command was an Erase Set-Up command, then the CUI will
close the address and data latches, and begin erasing the block indicated on the
address pins. If a program or erase operation was previously suspended, this
command will resume that operation.
During program/erase, the device will respond only to the Read Status Register,
Program Suspend/Erase Suspend commands and will output status register
data when CE# or OE# is toggled.
相關(guān)PDF資料
PDF描述
28F008SA-L 8-MBIT (1 MBIT x 8) FLASHFILETM MEMORY
28F008S3 3 V FlashFile Memory(3V閃速存儲(chǔ)器)
28F016S3 3 V FlashFile Memory(3V閃速存儲(chǔ)器)
28F008S5 8-MBIT 5 VOLT FlashFile Memory(8M位5V閃速存儲(chǔ)器)
28F016S5 16-MBIT 5V FlashFile Memory(16M位5V閃速存儲(chǔ)器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
28F008SA-L 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:8 MBIT (1 MBIT x 8) FLASH MEMORY
28F008SAT-ZW 制造商: 功能描述: 制造商:undefined 功能描述:
28F008SC 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4. 8. AND 16 MBIT
28F010 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:1024K (128K x 8) CMOS FLASH MEMORY
28F0101024K 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:28F010 1024K (128K X 8) CMOS FLASH MEMORY
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