- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371435 > 28F160C3 (INTEL CORP) 3 Volt Advanced Boot Block Flash Memory(3 V 高級(jí)快速引導(dǎo)塊閃速存儲(chǔ)器) PDF資料下載
參數(shù)資料
| 型號(hào)： | 28F160C3 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | 3 Volt Advanced Boot Block Flash Memory(3 V 高級(jí)快速引導(dǎo)塊閃速存儲(chǔ)器) |
| 中文描述： | 8M X 8 FLASH 3V PROM |
| 文件頁數(shù)： | 13/59頁 |
| 文件大小： | 321K |
| 代理商： | 28F160C3 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁
E
3.2.2
28F800C3, 28F160C3, 28F320C3
13
PRELIMINARY
READ CONFIGURATION
The Read Configuration mode outputs three types
of information: the manufacturer/device identifier,
the block locking status, and the protection register.
The device is switched to this mode by writing the
Read Configuration command (90H). Once in this
mode, read cycles from addresses shown in Table
4 retrieve the specified information. To return to
read array mode, write the Read Array command
(FFH).
Table 4. Read Configuration Table
Item
Address
Data
Manufacturer Code (x16)
00000
0089
Device ID (See Appendix F)
00001
ID
Block Lock Configuration
2
XX002
(1)
LOCK
Block Is Unlocked
DQ
0
= 0
Block Is Locked
DQ
0
= 1
Block Is Locked-Down
DQ
1
= 1
Protection Register Lock
3
80
PR-LK
Protection Register (x16)
81-88
PR
NOTES:
1.
“XX” specifies the block address of lock configuration
being read.
See Section 3.3.4 for valid lock status outputs.
See Section 3.4 for protection register information.
Other locations within the configuration address space
are reserved by Intel for future use.
2.
3.
4.
3.2.3
READ STATUS REGISTER
The status register indicates the status of device
operations,
and
the
operation. The Read Status Register (70H)
command causes subsequent reads to output data
from the status register until another command is
issued. To return to reading from the array, issue a
Read Array (FFH) command.
success/failure
of
that
The status register bits are output on DQ
0
–DQ
7
.
The upper byte, DQ
8
–DQ
15
, outputs 00H during a
Read Status Register command.
The contents of the status register are latched on
the falling edge of OE# or CE#, whichever occurs
last. This prevents possible bus errors which might
occur if status register contents change while being
read. CE# or OE# must be toggled with each
subsequent status read, or the status register will
not indicate completion of a program or erase
operation.
When the WSM is active, SR.7 will indicate the
status of the WSM; the remaining bits in the status
register indicate whether the WSM was successful
in performing the desired operation (see Table 7).
3.2.3.1
Clearing the Status Register
The WSM sets status bits 1 through 7 to “1,” and
clears bits 2, 6 and 7 to “0,” but cannot clear status
bits 1 or 3 through 5 to “0.” Because bits 1, 3, 4 and
5 indicate various error conditions, these bits can
only be cleared through the use of the Clear Status
Register (50H) command. By allowing the system
software to control the resetting of these bits,
several operations may be performed (such as
cumulatively programming several addresses or
erasing multiple blocks in sequence) before reading
the status register to determine if an error occurred
during that series. Clear the status register before
beginning another command or sequence. Note
that this is different from a burst device. The Read
Array command must be issued before data can be
read from the memory array. Resetting the device
also clears the status register.
3.2.4
READ QUERY
The read query mode outputs Common Flash
Interface (CFI) data when the device is read. This
can be accessed by writing the Read Query
Command (98H). The CFI data structure contains
information such as block size, density, command
set and electrical specifications. Once in this mode,
read cycles from addresses shown in Appendix C
retrieve the specified information. To return to read
array mode, write the Read Array command (FFH).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 28F320D18 | 1.8 Volt Intel Dual-Plane Flash Memory(1.8 V Intel 雙平面閃速存儲(chǔ)器) |
| 28F320J5 | 5 Volt Intel StrataFlash Memory(5 V 32M位英特爾StrataFlash存儲(chǔ)器) |
| 28F640J5 | 5 V Intel StrataFlash Memory(5V 64M位英特爾StrataFlash閃速存儲(chǔ)器) |
| 28F400B3 | SMART 3 ADVANCED BOOT BLOCK WORD-WIDE |
| 28F400BL-TB | 4-MBlT (256K x 16, 512K x 8) LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F160C3BA90 | 制造商: 功能描述: 制造商:Intel 功能描述: 制造商:undefined 功能描述: |
| 28F160C3TD70 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F160F3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FAST BOOT BLOCK FLASH MEMORY FAMILY 8 AND 16 MBIT |
| 28F160F3B95 | 制造商:Intel 功能描述: |
| 28F160S3 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。