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參數(shù)資料
| 型號： | 29F0408RPFS |
| 廠商： | MAXWELL TECHNOLOGIES |
| 元件分類： | PROM |
| 英文描述： | 32 Megabit (4M x 8-Bit) Flash Memory |
| 中文描述： | 4M X 8 FLASH 5V PROM, 35 ns, DFP44 |
| 封裝： | DFP-44 |
| 文件頁數(shù)： | 2/33頁 |
| 文件大?。?/td> | 941K |
| 代理商： | 29F0408RPFS |
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Alldatasheetsaresubjecttochangewithoutnotice
2002MaxwellTechnologies
Allrightsreserved.
32Megabit(4Mx8-Bit)FlashMemory
29F0408
11.08.02Rev2
T
ABLE
1.P
INOUT
D
ESCRIPTION
P
IN
S
YMBOL
D
ESCRIPTION
2
CommandLatch
Enable(CLE)
TheCLE inputcontrolsthepathactivationforcommandssenttothecommandregister.
Whenactivehigh, commandsarelatchedintothecommandregisterthroughtheI/Oports
ontherisingedgeoftheWE signal.
3
AddressLatchEnable
(ALE)
TheALE inputcontrolsthepathactivationforaddressandinputdatatotheinternal
address/dataregister.AddressesarelatchedontherisingedgeorWE withALE high, and
inputdataislatchedwhenALE islow
43
ChipEnable(CE)
TheCE inputisthedeviceselectioncontrol.WhenCE goeshighduringareadoperation,
thedeviceisreturnedtostandbymode.However, whenthedeviceisinthebusystatedur-
ingprogramorerase, CE highisignored, anddoesnotreturnthedevicetostandbymode.
4
WriteEnable(WE)
TheWE inputcontrolswritestotheI/Oport.Commands, addressanddataarelatchedon
therisingedgeoftheWE pulse.
42
ReadEnable(RE)
TheRE inputsistheserialdata-outcontrol, andwhenactivedrivesthedataontotheI/O
bus.Dataisvalidt
REA
afterthefallingedgeofRE whichalsoincrementstheinternalcolumn
addresscounterbyone.
40
SpareAreaEnable
(SE)
TheSE inputcontrolsthespareareaselectionwhenSE ishigh, thedeviceisdeselected
thespareareaduringRead1, SequentialdatainputandpageProgram
18-21,
24-27
I/OPort:I/O0~I/O7 TheI/Opinsareusedtoinputcommand,addressanddata, andtooutputdataduringread
operations.TheI/OpinsfloattoHigh-Zwhenthechipisdeselectedorwhentheoutputsare
disabled.
5
WriteProtect(WP)
TheWPpinprovidesinadvertentwrite/eraseprotectionduringpowertransitions.Theinter-
nalhighvoltagegeneratorisresetwhentheWP pinisactivelow
41
Read/Busy(R/B)
TheR/Boutputindicatesthestatusofthedeviceoperation.Whenlow itindicatesthata
programeraseorrandomreadoperationisinprocessandreturnstohighstateuponcom-
pletion.ItisanopendrainoutputanddoesnotfloattoHigh-Zconditionwhenthechipis
deselectedorwhenoutputsaredisabled.
6-17, 28-39
NC
NotConnected
1, 22
V
SS
V
CC
V
CC
Q
Ground
44
SupplyVoltage
23
OutputBufferVoltage
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