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| 型號： | 29F1610A |
| 廠商： | Macronix International Co., Ltd. |
| 元件分類： | EEPROM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 該CAT24FC02是一個2 KB的EEPROM的國內(nèi)256個8位每字舉辦的串行CMOS |
| 文件頁數(shù)： | 14/39頁 |
| 文件大?。?/td> | 669K |
| 代理商： | 29F1610A |
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14
P/N: PM0506
REV.1.7, JUN. 15, 2001
MX29F1610A
RY/BY PIN AND PROGRAM/ERASE
POLLING
RY/BY is a dedicated, open-drain page program and sector
erase completion. It transitions to VOL after a program or
erase command sequence is written to the MX29F1610A,
and returns to VCC when the WSM has finished executing
the internal algorithm. Since RY/BY is an open-drain
output, several RY/BY pins can be tied together in parallel
with a pull-up resistor to VCC.
RY/BY can be connected to the interrupt input of the
system CPU or controller. It is active at all times, not
tristated if the CE or OE inputs are brought to VIH. RY/
BY is also VCC when the device is in erase suspend or
deep power-down modes.
RY/BY pin is not provided in 44-pin SOP package.
The MX29F1610A is designed to offer protection against
accidental erasure or programming caused by spurious
system level signals that may exist during power
transitions. During power up the device automatically
resets the internal state machine in the Read Array mode.
Also, with its control register architecture, alteration of the
memory contents only occurs after successful
completion of specific multi-bus cycle command
sequences.
The device also incorporates several features to prevent
inadvertent write cycles resulting from VCC power-up
and power-down transitions or system noise.
DATA PROTECTION
LOW VCC WRITE INHIBIT
To avoid initiation of a write cycle during VCC power-up
and power-down, a write cycle is locked out for VCC less
than VLKO(= 3.2V , typically 3.5V). If VCC < VLKO, the
command register is disabled and all internal program/
erase circuits are disabled. Under this condition the
device will reset to the read mode. Subsequent writes will
be ignored until the VCC level is greater than VLKO. It is
the user's responsibility to ensure that the control pins are
logically correct to prevent unintentional write when VCC
is above VLKO.
WRITE PULSE "GLITCH" PROTECTION
Noise pulses of less than 10ns (typical) on CE or WE will
not initiate a write cycle.
LOGICAL INHIBIT
Writing is inhibited by holding any one of OE = VIL,CE =
VIH or WE = VIH. To initiate a write cycle CE and WE
must be a logical zero while OE is a logical one.
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PDF描述 |
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| 29F1610A-10 | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 29F1610A-12 | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 29F1610A-90 | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 29F200C-55 | 2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 29F1610A-10 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:16M-BIT [2M x8/1M x16] CMOS SINGLE VOLTAGE FLASH EEPROM |
| 29F1610A-12 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:16M-BIT [2M x8/1M x16] CMOS SINGLE VOLTAGE FLASH EEPROM |
| 29F1610A-90 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:16M-BIT [2M x8/1M x16] CMOS SINGLE VOLTAGE FLASH EEPROM |
| 29F200 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit 256Kb x8 or 128Kb x16, Boot Block Single Supply Flash Memory |
| 29F200BB-70EI | 制造商:undefined 功能描述: |
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