23
P/N:PM1186
MX29LV160C T/B
REV. 1.2, JAN. 19, 2006
NOTES:
1. Not 100% tested.
2. tDF is defined as the time at which the output achieves
the open circuit condition and data is no longer driven.
TEST CONDITIONS:
Input pulse levels: 0V/3.0V.
Input rise and fall times is equal to or less than 5ns.
Output load: 1 TTL gate + 100pF (Including scope and
jig) for 29LV160C T/B-90, 1 TTL gate + 30pF (Including
scope and jig) for 29LV160C T/B-70.
Reference levels for measuring timing: 1.5V.
AC CHARACTERISTICSTA = -40
o
C to 85
o
C, VCC = 2.7V~3.6V
Table 10. READ OPERATIONS
29LV160C-55R 29LV160C-70
29LV160C-90
SYMBOL PARAMETER
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
UNIT
CONDITIONS
tRC
Read Cycle Time (Note 1)
55
70
90
ns
tACC
Address to Output Delay
55
70
90
ns
CE#=OE#=VIL
tCE
CE# to Output Delay
55
70
90
ns
OE#=VIL
tOE
OE# to Output Delay
30
30
30
ns
CE#=VIL
tDF
OE# High to Output Float (Note 2)
0
25
0
25
0
25
ns
CE#=VIL
tOEH
Output Enable Read
0
0
0
ns
Hold Time
Toggle and
10
10
10
ns
Data# Polling
tOH
Address to Output hold
0
0
0
ns
CE#=OE#=VIL