- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371440 > 29LV400C-70 (Macronix International Co., Ltd.) 4M-BIT [512K x 8 / 256K x 16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY PDF資料下載
參數(shù)資料
| 型號： | 29LV400C-70 |
| 廠商： | Macronix International Co., Ltd. |
| 英文描述： | 4M-BIT [512K x 8 / 256K x 16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
| 中文描述： | 4分位[為512k × 8 / 256K × 16] CMOS單電壓3V時僅閃存 |
| 文件頁數(shù)： | 6/68頁 |
| 文件大?。?/td> | 906K |
| 代理商： | 29LV400C-70 |
第1頁第2頁第3頁第4頁第5頁當(dāng)前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
6
P/N:PM1155
MX29LV400C T/B
REV. 1.5, APR. 24, 2006
AUTOMATIC PROGRAMMING
The MX29LV400C T/B is byte programmable using the
Automatic Programming algorithm. The Automatic Pro-
gramming algorithm makes the external system do not
need to have time out sequence nor to verify the data
programmed. The typical chip programming time at room
temperature of the MX29LV400C T/B is less than 10
seconds.
AUTOMATIC CHIP ERASE
The entire chip is bulk erased using 10 ms erase pulses
according to MXIC's Automatic Chip Erase algorithm.
Typical erasure at room temperature is accomplished in
less than 4 second. The Automatic Erase algorithm au-
tomatically programs the entire array prior to electrical
erase. The timing and verification of electrical erase are
controlled internally within the device.
AUTOMATIC SECTOR ERASE
The MX29LV400C T/B is sector(s) erasable using MXIC's
Auto Sector Erase algorithm. The Automatic Sector
Erase algorithm automatically programs the specified
sector(s) prior to electrical erase. The timing and verifi-
cation of electrical erase are controlled internally within
the device. An erase operation can erase one sector,
multiple sectors, or the entire device.
AUTOMATIC PROGRAMMING ALGORITHM
MXIC's Automatic Programming algorithm requires the
user to only write program set-up commands (including
2 unlock write cycle and A0H) and a program command
(program data and address). The device automatically
times the programming pulse width, provides the pro-
gram verification, and counts the number of sequences.
A status bit similar to Data# Polling and a status bit
toggling between consecutive read cycles, provide feed-
back to the user as to the status of the programming
operation. Refer to write operation status, table7, for more
information on these status bits.
AUTOMATIC ERASE ALGORITHM
MXIC's Automatic Erase algorithm requires the user to
write commands to the command register using stan-
dard microprocessor write timings. The device will auto-
matically pre-program and verify the entire array. Then
the device automatically times the erase pulse width,
provides the erase verification, and counts the number of
sequences. A status bit toggling between consecutive
read cycles provides feedback to the user as to the sta-
tus of the erasing operation.
Register contents serve as inputs to an internal state-
machine which controls the erase and programming cir-
cuitry. During write cycles, the command register inter-
nally latches address and data needed for the program-
ming and erase operations. During a system write cycle,
addresses are latched on the falling edge, and data are
latched on the rising edge of WE# or CE#, whichever
happens first.
MXIC's Flash technology combines years of EPROM
experience to produce the highest levels of quality, reli-
ability, and cost effectiveness. The MX29LV400C T/B
electrically erases all bits simultaneously using Fowler-
Nordheim tunneling. The bytes are programmed by us-
ing the EPROM programming mechanism of hot elec-
tron injection.
During a program cycle, the state-machine will control
the program sequences and command register will not
respond to any command set. During a Sector Erase
cycle, the command register will only respond to Erase
Suspend command. After Erase Suspend is completed,
the device stays in read mode. After the state machine
has completed its task, it will allow the command regis-
ter to respond to its full command set.
AUTOMATIC SELECT
The automatic select mode provides manufacturer and
device identification, and sector protection verification,
through identifier codes output on Q7~Q0. This mode is
mainly adapted for programming equipment on the de-
vice to be programmed with its programming algorithm.
When programming by high voltage method, automatic
select mode requires VID (11.5V to 12.5V) on address
pin A9 and other address pin A6, A1 as referring to Table
3. In addition, to access the automatic select codes in-
system, the host can issue the automatic select com-
mand through the command register without requiring VID,
as shown in table4.
To verify whether or not sector being protected, the sec-
tor address must appear on the appropriate highest order
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 29LV400C-90 | 4M-BIT [512K x 8 / 256K x 16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
| 29LV650 | 64M (4M x 16) BIT |
| 29LV800BB-70 | 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
| 29LV800BB-90 | 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
| 29LV800BT-70 | 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 29LV400C-90 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:4M-BIT [512K x 8 / 256K x 16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY |
| 29LV51215JU | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 29LV512-15JU | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 29LV640 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:flash memory |
| 29LV640DL90RZI | 制造商: 功能描述: 制造商:undefined 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。