Product Specification
PE3341
Page 13 of 17
Document No. 70-0053-05
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2005-8 Peregrine Semiconductor Corp. All rights reserved.
Evaluation and Programming Kit Support
To provide easy evaluation of the PE3341 and to
also enable programming of small evaluation
quantities, Peregrine has developed complete
evaluation kits and programming kits for the
PE3341 EEPROM PLLs.
Evaluation Kits
The evaluation kits consist of an evaluation board
and support software enabling the user to
evaluate the full functionality of the part. The
EEPROM can be loaded with user specified
values and then placed in a self start-up mode.
Please refer to Table 14, Ordering Information, for
the specific order codes.
Programming Kits
The programming kits consist of a programming
board and support software that enables the user
to program small quantities of devices for
prototype evaluation and for small pre-production
runs. Please refer to Table 14, Ordering
Information, for the specific order codes
Large production quantities can be special
programmed at Peregrine for an additional
charge. Please contact Peregrine Sales for pricing
and leadtime at sales@psemi.com.
Application Information
The PE3341 has been designed to allow a self-
starting PLL synthesizer to be built, removing the
need to have a micro-controller or other
programming source load data into the device on
power-up. It can be used as a remotely
controllable PLL as well, since the EEPROM
circuitry has been added to a complete PLL core
(PE3339).
The PE3341’s EEPROM can be programmed in-
circuit, or prior to assembly using a socketed
fixture.
It can be reprogrammed a minimum of 100 times,
but is not designed to support constant
reprogramming of the EEPROM by an application.
Self-Starting Mode
In self-starting applications, the EE Register is
used to control the device and must be selected
per Table 9. Additionally, the contents of the
EEPROM must be copied to the EE Register per
Table 10, and device power must be stable for this
transfer to be reliably accomplished. These
requirements can be met by connecting a
capacitor of 50pF-10uF (evaluation design uses
3.3uF) from the EESel pin to ground. The delay of
the rising edge on EESel, created by the RC time
constant of its 70k ohm internal pull-up resistor
and the external capacitor, will allow device power
to stabilize first, ensuring proper data transfer.
This edge is adaptable by capacitor value
selection. The Vcc applied to the IC must be
settled first.
Obsolete
Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com