3D3215
Doc #01014
12/3/01
DATA DELAY DEVICES, INC.
2
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
APPLICATION NOTES
OPERATIONAL DESCRIPTION
The 3D3215 five-tap delay line architecture is
shown in Figure 1. The delay line is composed of
a number of delay cells connected in series.
Each delay cell produces at its output a replica of
the signal present at its input, shifted in time. The
delay cells are matched and share the same
compensation signals, which minimizes tap-to-tap
delay deviations over temperature and supply
voltage variations.
INPUT SIGNAL CHARACTERISTICS
The Frequency and/or Pulse Width (high or low)
of operation may adversely impact the specified
delay accuracy of the particular device. The
reasons for the dependency of the output delay
accuracy on the input signal characteristics are
varied and complex. Therefore a
Recommended
Maximum
and an
Absolute Maximum
operating
input frequency and a
Recommended Minimum
and an
Absolute Minimum
operating pulse width
have been specified.
OPERATING FREQUENCY
The
Absolute Maximum Frequency
specification, tabulated in Table 1, determines the
highest frequency of the delay line input signal
that can be reproduced, shifted in time at the
device output, with acceptable duty cycle
distortion.
The
Recommended Maximum Frequency
specification determines the highest frequency of
the delay line input signal for which the output
delay accuracy is guaranteed. To guarantee the
Table 1 delay accuracy for input frequencies
higher than the
Recommended Maximum
Frequency, the 3D3215 must be tested at the
user operating frequency. Therefore, to facilitate
production and device identification, the part
number will include a custom reference
designator identifying the intended frequency of
operation. The programmed delay accuracy of
the device is guaranteed, therefore, only at the
user specified input frequency. Small input
frequency variation about the selected frequency
will only marginally impact the programmed delay
accuracy, if at all.
Nevertheless, it is strongly
recommended that the engineering staff at
DATA DELAY DEVICES be consulted.
OPERATING PULSE WIDTH
The
Absolute Minimum Pulse Width
(high or
low) specification, tabulated in Table 1,
determines the smallest Pulse Width of the delay
line input signal that can be reproduced, shifted in
time at the device output, with acceptable pulse
width distortion.
The
Recommended Minimum Pulse Width
(high or low) specification determines the
smallest Pulse Width of the delay line input signal
for which the output delay accuracy tabulated in
Table 1 is guaranteed.
To guarantee the Table 1
delay accuracy for input
pulse width smaller than the Recommended
Minimum Pulse Width, the 3D3215 must be
tested at the user operating pulse width.
Therefore, to facilitate production and device
VDD
O1
IN
O2
O3
O4
Temp & VDD
Compensation
GND
Figure 1: 3D3215 Functional Diagram
25%
25%
25%
25%
O5
VDD
O1
IN
O2
O3
O4
Temp & VDD
Compensation
GND
20%
20%
20%
20%
20%
O5
Dash numbers < 8
Dash numbers >= 8