參數(shù)資料
型號: 3D7220G-700
廠商: DATA DELAY DEVICES INC
元件分類: 通用總線功能
英文描述: MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7220)
中文描述: ACTIVE DELAY LINE, TRUE OUTPUT, PDSO14
封裝: ROHS COMPLIANT, GULL-WING, DIP-14
文件頁數(shù): 1/4頁
文件大?。?/td> 135K
代理商: 3D7220G-700
3D7220
MONOLITHIC 10-TAP
FIXED DELAY LINE
(SERIES 3D7220)
FEATURES
All-silicon, low-power CMOS technology
TTL/CMOS compatible inputs and outputs
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
Low ground bounce noise
Leading- and trailing-edge accuracy
Delay range:
0.75ns through 7000ns
Delay tolerance:
2% or 0.5ns
Temperature stability:
±
2% typical (-40C to 85C)
Vdd stability:
±
1% typical (4.75V-5.25V)
Minimum input pulse width:
15% of total delay
14-pin Gull-Wing available as drop-in
replacement for hybrid delay lines
FUNCTIONAL DESCRIPTION
The 3D7220 10-Tap Delay Line product family consists of fixed-delay
CMOS integrated circuits. Each package contains a single delay line,
tapped and buffered at 10 points spaced uniformly in time. Tap-to-tap
(incremental) delay values can range from 0.75ns through 700ns. The
input is reproduced at the outputs without inversion, shifted in time as
per the user-specified dash number. The 3D7220 is TTL- and CMOS-
compatible, capable of driving ten 74LS-type loads, and features both
rising- and falling-edge accuracy.
The all-CMOS 3D7220 integrated circuit has been designed as a
reliable, economic alternative to hybrid TTL fixed delay lines. It is
offered in a standard 14-pin auto-insertable DIP and space saving
surface mount 14-pin SOIC and 16-pin SOL packages.
TABLE 1: PART NUMBER SPECIFICATIONS
PACKAGES
14
13
12
11
10
9
8
1
2
3
4
5
6
7
IN
N/C
O2
O4
O6
O8
GND
VDD
O1
O3
O5
O7
O9
O10
3D7220-xx
3D7220G-xx Gull-Wing
DIP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN
N/C
N/C
O2
O4
O6
O8
GND
VDD
N/C
O1
O3
O5
O7
O9
O10
3D7220S-xx SOL
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IN
N/C
O2
O4
O6
O8
GND
VDD
O1
O3
O5
O7
O9
O10
3D7220D-xx SOIC
PIN DESCRIPTIONS
IN
Delay Line Input
O1
Tap 1 Output (10%)
O2
Tap 2 Output (20%)
O3
Tap 3 Output (30%)
O4
Tap 4 Output (40%)
O5
Tap 5 Output (50%)
O6
Tap 6 Output (60%)
O7
Tap 7 Output (70%)
O8
Tap 8 Output (80%)
O9
Tap 9 Output (90%)
O10
Tap 10 Output (100%)
VDD +5 Volts
GND Ground
For mechanical dimensions, click
here
.
For package marking details, click
here
.
TOLERANCES
TOTAL
DELAY (ns)
6.75
±
0.5*
9.0
±
0.5*
13.5
±
0.5*
18.0
±
0.5*
22.5
±
0.5*
36.0
±
0.7*
50.0
±
1.0
100.0
±
2.0
200.0
±
4.0
500.0
±
10
1000
±
20
7000
±
140
INPUT RESTRICTIONS
Absolute Max
Frequency
166.7 MHz
166.7 MHz
166.7 MHz
166.7 MHz
125.0 MHz
133.3 MHz
66.7 MHz
33.3 MHz
16.7 MHz
6.67 MHz
3.33 MHz
0.48 MHz
DASH
NUMBER
TAP-TAP
DELAY (ns)
0.75
±
0.4
1.0
±
0.5
1.5
±
0.7
2.0
±
0.8
2.5
±
1.0
4.0
±
1.3
5.0
±
1.5
10.0
±
2.0
20.0
±
4.0
50.0
±
10
100
±
20
700
±
140
Rec’d Max
Frequency
28.4 MHz
23.8 MHz
18.0 MHz
14.5 MHz
12.1 MHz
8.33 MHz
6.67 MHz
3.33 MHz
1.67 MHz
0.67 MHz
0.33 MHz
0.05 MHz
Rec’d Min
Pulse Width
17.6 ns
21.0 ns
27.8 ns
34.5 ns
41.2 ns
60.0 ns
75.0 ns
150 ns
300 ns
750 ns
1500 ns
10500 ns
Absolute Min
Pulse Width
3.00 ns
3.00 ns
3.00 ns
3.00 ns
4.00 ns
6.00 ns
7.50 ns
15.0 ns
30.0 ns
75.0 ns
-.75
-1
-1.5
-2
-2.5
-4
-5
-10
-20
-50
-100
-700
150 ns
1050 ns
* Total delay referenced to Tap1 output; Input-to-Tap1 = 5.0ns
±
1.0ns
NOTE:
Any dash number between .75 and 700 not shown is also available as standard.
2005 Data Delay Devices
Doc #03004
4/15/05
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
3D7220S-.75 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7220)
3D7220S-1 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7220)
3D7220S-1.5 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7220)
3D7220S-10 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7220)
3D7220S-100 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7220)