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參數(shù)資料
| 型號： | 4AM12 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Silicon N-Channel/P-Channel Power MOS FET Array(N溝道/P溝道功率MOSFET陣列) |
| 中文描述： | 硅N-Channel/P-Channel功率MOS FET陣列（不適用溝道/頁溝道功率MOSFET的陣列） |
| 文件頁數(shù)： | 3/5頁 |
| 文件大小： | 41K |
| 代理商： | 4AM12 |
4AM12
3
Electrical Characteristics (Ta = 25°C) (1 Unit)
N channel
P channel
Item
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test conditions
Drain to source
breakdown voltage
V
(BR)DSS
60
—
–60
—
V
I
D = 10 mA, VGS = 0
Gate to source
breakdown voltage
V
(BR)GSS
±20
—
±20
——A
I
G = ±100 A, VDS = 0
Gate to source leak
current
I
GSS
——±10
A
V
GS = ±16 V, VDS = 0
Zero gate voltage drain
current
I
DSS
—
250
—
–250 V
V
DS = 50 V, VGS = 0
Gate to source cutoff
voltage
V
GS(off)
1.0
—
2.0
–1.0
—
–2.0
V
I
D = 1 mA, VDS = 10 V
Static drain to source
on state resistance
R
DS(on)
—
0.06
0.075 —
0.09
0.12
I
D = 4 A, VGS = 10 V*
1
—
0.08
0.11
—
0.12
0.18
I
D = 4 A, VGS = 4 V*
1
Forward transfer
admittance
|y
fs|
5.5
9.0
—
5.5
7.5
—
S
I
D = 4 A, VDS = 10 V*
1
Input capacitance
Ciss
—
860
—
1400 —
pF
V
DS = 10 V, VGS = 0,
f = 1 MHz
Output capacitance
Coss
—
450
—
720
—
pF
Reverse transfer
capacitance
Crss
—
140
—
220
—
pF
Turn-on delay time
t
d(on)
—10
—
—15
—
ns
I
D = 4 A, VGS = 10 V,
R
L = 7.5
Rise time
t
r
—45
—
—90
—
ns
Turn-off delay time
t
d(off)
—
200
—
250
—
ns
Fall time
t
f
—
100
—
150
—
ns
Body to drain diode
forward voltage
V
DF
—
1.05
—
–1.05 —
V
I
F = 8 A, VGS = 0
Body to drain diode
reverse recovery time
t
rr
—
110
—
180
—
ns
I
F = 8 A, VGS = 0,
dIF/dt = 50 A/s
Note
1. Pulse Test
Polarity of test conditions for P channel device is reversed.
Nch: See characteristic curves of 2SK971
Pch: See characteristic curves of 2SJ173
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