參數(shù)資料
型號: 4X16E83VTW-6
廠商: Electronic Theatre Controls, Inc.
英文描述: 4 MEG x 16 EDO DRAM
中文描述: 4邁可× 16 EDO公司的DRAM
文件頁數(shù): 4/24頁
文件大?。?/td> 598K
代理商: 4X16E83VTW-6
12
NOTES (continued)
28. Output parameter (DQx) is referenced to
corresponding CAS# input; DQ0-DQ7 by CASL#
and DQ8-DQ15 by CASH#.
29. Each CASx# must meet minimum pulse width.
30. The last CASx# edge to transition HIGH.
31. Last falling CASx# edge to first rising CASx#
edge.
32. Last rising CASx# edge to first falling CASx#
edge.
33. Last rising CASx# edge to next cycle?s last rising
CASx# edge.
34. Last CASx# to go LOW.
35. VIH overshoot: VIH (MAX) = VCC + 2V for a pulse
width 3ns, and the pulse width cannot be
greater than one third of the cycle rate. VIL
undershoot: VIL (MIN) = -2V for a pulse width
3ns, and the pulse width cannot be greater than
one third of the cycle rate.
36. NC pins are assumed to be left floating and are
not tested for leakage.
37. Self refresh and extended refresh for either device
requires that at least 4,096 cycles be completed
every 128ms.
4 MEG x 16
EDO DRAM
相關(guān)PDF資料
PDF描述
4X16E83V 4 MEG x 16 EDO DRAM
5-1437508-1 TRANSISTOR SOCKET
5-1437508-8 TO-5, TRANSISTOR SOCKET
5-1437515-1 IC SOCKET
5-1437515-3 IC SOCKET
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