參數(shù)資料
型號: 5962-8766001GA
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: MOSFETs
英文描述: 2 CHANNEL, BUF OR INV BASED MOSFET DRIVER, MBCY8
封裝: METAL CAN-8
文件頁數(shù): 14/15頁
文件大小: 784K
代理商: 5962-8766001GA
MAX706P/R/S/T
,MAX706AP/AR/AS/A
T
,MAX708R/S/T
+3V Voltage Monitoring, Low-Cost P
Supervisory Circuits
8
_______________________________________________________________________________________
WDO can be connected to the nonmaskable interrupt
(NMI) input of a P. When VCC drops below the reset
threshold, WDO immediately goes low, even if the
watchdog timer has not timed out (Figure 3). Normally,
this would trigger an NMI, but since reset is asserted
simultaneously, the NMI is overridden. The WDO
should not be connected to RESET directly. Instead,
connect WDO to MR to generate a reset pulse when it
times out.
Manual Reset
The manual reset (MR) input allows RESET and RESET
to be activated by a pushbutton switch. The switch is
effectively debounced by the 140ms minimum reset
pulse width. MR can be driven by an external logic line
since it is TTL/CMOS compatible. The minimum MR
input pulse width is 500ns when VCC = +3V and 150ns
when VCC = +5V. Leave MR unconnected or connect
to VCC when not used.
Power-Fail Comparator
The power-fail comparator can be used for various pur-
poses because its output and noninverting input are
not internally connected. The inverting input is internally
connected to a 1.25V reference. The power-fail com-
parator has 10mV of hysteresis, which prevents repeat-
ed triggering of the power-fail output (PFO).
tRST
+3.3V
0V
+3.3V
+1V
0V
RESET
WDO*
+3.3V
0V
MR*
tMR
*NOTE: MR EXTERNALLY DRIVEN LOW.
WDO TIMING SHOWN FOR MAX706P/R/S/T.
+3.3V
0V
VCC
VRST
tMD
tWP
tWD
+3V/+3.3V
0V
WDI
+3V/+3.3V
0V
WDO
+3V/+3.3V
0V
RESET
tRST
RESET EXTERNALLY
TRIGGERED BY MR
MAX706_
MAX708R/S/T
RESET
(RESET)
130k
1%
PARAMETER
MIN
TYP
MAX
UNIT
+12V RESET
THRESHOLD AT +25
°C
10.24
10.87
11.50
V
1M
1%
+3V/+3.3V
+12V
VCC
PFI
( ) ARE FOR MAX706P/AP
GND
MR
PFO
TO
P
MAX706R/S/T
MAX708R/S/T
MAX706AR/AS/AT
RESET
R1
Figure 4. MAX706AP/AR/AS/AT Watchdog Timing
Figure 3. RESET, RESET, MR, and WDO Timing
Figure 5. Monitoring Both +3V/+3.3V and +12V
Figure 6. RESET Valid to GND Circuit
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