參數(shù)資料
型號(hào): 5962-88650012X
廠(chǎng)商: MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi): ADC
英文描述: 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, CQCC20
封裝: CERAMIC, LCC-20
文件頁(yè)數(shù): 2/17頁(yè)
文件大小: 227K
代理商: 5962-88650012X
MAX4814E
DA1 select the connections of switch A to switch SW_
and inputs DB0 and DB1. Select the connections of
switch B to SW_. See Table 3a for the pin configuration
and Table 3b for a complete summary.
I2C Interface Method (Mode 1)
In mode 1, the switch connections are controlled
through the I2C interface. Inputs SDA and SCL program
registers R0 and R1. Register R0, bits [7 to 2], select
the connection of switch A and switch B to switch SW_
(see the
I2C Registers and Bit Descriptions section).
The bits of register R1 transfer data to the output DO_.
The data on output DO_ is used to communicate with the
MAX3845. In mode 1, DA0/DO0 becomes output DO0,
DA1/DO1 becomes output DO1, DA2/DO2 becomes
output DO2, and DB0/DO3 becomes output DO3. DB1
and DB2 are high impedance. See Table 3a for the pin
configuration. See Table 4 for register R1 to DO_ output
mapping.
I2C Registers and Bit Descriptions
Two internal registers (RO and R1) program the
MAX4814E. Table 2 lists both registers, their address-
es, and power-up default states. Both registers are
read/write registers.
In register R0, bit BAEN is used as the enable for
switch A, and bit BBEN is used as the enable for switch
B. Writing 1 to bit BAEN enables switch A; and writing 0
to bit BAEN disables switch A. Writing 1 to bit BBEN
enables switch B, and writing 0 to bit BBEN disables
switch B. BASEL1 and BASEL0 select the connections
of switch A to switch SW_, while BBSEL1 and BBSEL0
select the connections of switch B to switch SW_, as
summarized in Table 6.
I2C Register R0 Two LSB Bits
The two LSBs are hard coded as 00. Register R0
ignores any value written to the two LSBs; anytime reg-
ister R0 is read the hard-coded values are returned.
Bank A Enable (BAEN) and Bank B Enable (BBEN) Bits
1 = Enable
0 = Disable
Bank A Select (BASEL1/BASEL0) and
Bank B Select (BBSEL1/BBSEL0) Bits
Bits BASEL1 and BASEL0 select the switch SW_ that
switch A is connected to. Bits BBSEL1 and BBSEL0
select the switch SW_ that switch B is connected to
(see Table 6).
Power-On Default States
When power is applied to the MAX4814E internal
power-on reset (POR), circuitry sets registers R0 and
R1 to their default states. Register R0 is set to all zeros,
or 00h, and register R1 is set to 10101010, or AAh, as
shown in Table 2.
Having all zeros in register R0 disables both banks A
and B; see Table 6 for register R0 to switch mapping.
Setting register R1 to AAh forces the outputs at DO_ to
be high impedance.
Note: The output, DO_ is used to communicate with the
MAX3845 when the MAX4814E is being used without its
companion. The MAX3845 and the MAX4814E use the
I2C interface (MODE = 1). All DO_ outputs need to be
connected through a 10kΩ resistor to GND.
DVI/HDMI 2:4 Low-Frequency Fanout Switch
10
______________________________________________________________________________________
X = Hardwired code, not programmable by user.
Table 1. Mode Configuration
INPUT PIN
MODE
OPERATION
0
Puts the device in mode 0. The direct-control inputs DA_ and DB_ control the switches.
1
Puts the device in mode 1. The switches are controlled by the I2C interface. DO_ becomes an active output.
Inputs DB1 and DB2 are high impedance.
Table 2. I2C Register Map
BIT
POWER-UP
REGISTER
7
6
5
432
1
0
ADDRESS
BINARY
HEX
R0
BBEN
BBSE
L1
BBSEL0
BAEN
BASEL1
BASE
L0
X
0x00
0000
00
R1
DO3
High
Impedance
DO3
Data
DO2
High
Impedance
DO2
Data
DO1
High
Impedance
DO1
Data
DO0
High
Impedance
DO0
Data
0x01
1010
AA
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