參數(shù)資料
型號(hào): 5962-8967402XX
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CQCC44
封裝: CERAMIC, LCC-44
文件頁數(shù): 11/27頁
文件大小: 3865K
代理商: 5962-8967402XX
19
Maxim Integrated
MAX5713/MAX5714/MAX5715
Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and SPI Interface
Table
2.
SPI
Commands
Summary
(continued)
COMMAND
B23
B22
B21
B20
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
DESCRIPTION
CONFIG
0
1
0
AllDACs
0
LD_EN
X
DACD
DACC
DACB
DACA
X
Sets
the
DAC
Latch
Mode
of
the
selected
DACs.
Only
DACS
with
a
1
in
the
selection
bit
are
updated
by
the
command.
LD_EN
=
0:
DAC
latch
is
operational
(LOAD
and
LDAC
controlled)
LD_EN
=
1:
DAC
latch
is
transparent
REF
0
1
0
REF
Power
0=
DAC
1=
ON
REF
Mode
00
=
EXT
01
=
2.5V
10
=
2.0V
11
=
4.1V
X
Sets
the
reference
operating
mode.
REF
Power
(B18):
0=
Internal
reference
is
only
powered
if
at
least
one
DAC
is
powered
1=
Internal
reference
is
always
powered
ALL
DAC
COMMANDS
CODE_ALL
1
0
CODE
REGISTER
DATA
[11:4]
CODE
REGISTER
DATA
[3:0]
X
Writes
data
to
all
CODE
registers
LOAD_ALL
1
0
1
X
Updates
all
DAC
latches
with
current
CODE
register
data
CODE_
ALL_
LOAD_ALL
1
0
1
X
CODE
REGISTER
DATA
[11:4]
CODE
REGISTER
DATA
[3:0]
X
Simultaneously
writes
data
to
all
CODE
registers
while
updating
all
DAC
registers
NO
OPERATION
COMMANDS
No
Operation
1
0
1
X
These
commands
will
have
no
effect
on
the
device
1
0
1
X
1
X
Reserved
Commands
:
Any
commands
not
specifically
listed
above
are
reserved
for
Maxim
internal
use
only.
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