參數(shù)資料
型號： 5962-8967601QX
廠商： CIRRUS LOGIC INC
元件分類： ADC
英文描述： 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP40
封裝： CERAMIC, DIP-40
文件頁數(shù)： 24/50頁
文件大?。?/td> 520K
代理商： 5962-8967601QX
Clock Feedthrough in the CS5014 and CS5016
Maintaining the integrity of analog signals in the
presence of digital switching noise is a difficult
problem. The CS5014/16 can be synchronized to
the digital system using the CLKIN input to
avoid conversion errors due to asynchronous in-
terference. However, digital interference will still
affect sampling purity due to coupling between
the CS5014/16’s analog input and master clock.
The effect of clock feedthrough depends on the
sampling conditions. If the sampling signal at the
HOLD input is synchronized to the master clock,
clock feedthrough will appear as a dc offset at
the CS5014/16’s output. The offset could theo-
retically reach the peak coupling magnitude
(Figure 35), but the probability of this occurring
is small since the peaks are spikes of short dura-
tion.
If sampling is performed asynchronously with the
master clock, clock feedthrough will appear as an
ac error at the CS5014/16’s output. With a fixed
Analog Input
Source Impedance
200
25
50
4MHz
2MHz
Master Clock
Clock Feedthrough
Int/Ext
Freq
Internal
External
2MHz
4MHz
RMS
Peak-to-Peak
15uV
25uV
40uV
25uV
80uV
70uV
110uV
150uV
110uV
325uV
Figure 35. Examples of Measured Clock Feedthrough
Signal
Amplitude
Relative to
Full Scale
dc
Input Frequency
0dB
-20dB
-40dB
-60dB
-80dB
-100dB
-120dB
28 kHz
Sampling Rate: 56 kHz
Full Scale: 9V p-p
S/(N+D): 81.5 dB
12 kHz
Figure 31. CS5014 FFT plot with 12 kHz
Full Scale Input
Signal
Amplitude
Relative to
Full Scale
dc
Input Frequency
0dB
-20dB
-40dB
-60dB
-80dB
-100dB
-120dB
25 kHz
Sampling Rate: 50 kHz
Full Scale: 9V p-p
S/(N+D): 84.3 dB
12 kHz
Figure 33. CS5016 FFT plot with 12 kHz
Full Scale Input
Signal
Amplitude
Relative to
Full Scale
dc
Input Frequency
0dB
-20dB
-40dB
-60dB
-80dB
-100dB
-120dB
25 kHz
Sampling Rate: 50 kHz
Full Scale: 9V p-p
S/(N+D): 71.9 dB
12 kHz
Figure 34. CS5016 FFT plot with 12 kHz
-20 dB Input
Signal
Amplitude
Relative to
Full Scale
dc
Input Frequency
0dB
-20dB
-40dB
-60dB
-80dB
-100dB
-120dB
28 kHz
Sampling Rate: 56 kHz
Full Scale: 9V p-p
S/(N+D): 64.6 dB
12 kHz
Figure 32. CS5014 FFT plot with 12 kHz
-20 dB Input
CS5012A, CS5014, CS5016
30
DS14F6
相關PDF資料
PDF描述
5962-8967601XX 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CQCC44
5962-8967602QX 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP40
5962-8967602XX 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CQCC44
5962-8967402QX 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP40
5962-8967901XX 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CQCC44
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