參數(shù)資料
型號: 5962-9089504QCA
廠商: TEXAS INSTRUMENTS INC
元件分類: 運算放大器
英文描述: OP-AMP, 40 uV OFFSET-MAX, 1.9 MHz BAND WIDTH, CDIP14
封裝: CERAMIC, DIP-14
文件頁數(shù): 13/36頁
文件大?。?/td> 916K
代理商: 5962-9089504QCA
0
– 50
0
10
203040
VI
Input
V
oltage
mV
VO
Output
V
oltage
V
– 5
t – Time – ms
0
50
60
70
80
V
I
V
O
VDD
± = ±5 V
TA = 25° C
Figure 34. Overload Recovery
TLC2654, TLC2654A
Advanced LinCMOS
LOW-NOISE CHOPPER-STABILIZED
OPERATIONAL AMPLIFIERS
SLOS020G – NOVEMBER 1988 – REVISED APRIL 2001
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
capacitor selection and placement
Leakage and dielectric absorption are the two important factors to consider when selecting external capacitors
CXA and CXB. Both factors can cause system degradation, negating the performance advantages realized by
using the TLC2654.
Degradation from capacitor leakage becomes more apparent with increasing temperatures. Low-leakage
capacitors and standoffs are recommended for operation at TA = 125°C. In addition, guard bands are
recommended around the capacitor connections on both sides of the printed-circuit board to alleviate problems
caused by surface leakage on circuit boards.
Capacitors with high dielectric absorption tend to take several seconds to settle upon application of power, which
directly affects input offset voltage. In applications needing fast settling of input voltage, high-quality film
capacitors such as mylar, polystyrene, or polypropylene should be used. In other applications, a ceramic or
other low-grade capacitor can suffice.
Unlike many choppers available today, the TLC2654 is designed to function with values of CXA and CXB in the
range of 0.1
F to 1 F without degradation to input offset voltage or input noise voltage. These capacitors
should be located as close as possible to CXA and CXB and return to either VDD– or C RETURN. On many
choppers, connecting these capacitors to VDD– causes degradation in noise performance; this problem is
eliminated on the TLC2654.
internal/external clock
The TLC2654 has an internal clock that sets the chopping frequency to a nominal value of 10 kHz. On 8-pin
packages, the chopping frequency can only be controlled by the internal clock; however, on all 14-pin packages
and the 20-pin FK package the device chopping frequency can be set by the internal clock or controlled
externally by use of the INT/EXT and CLK IN. To use the internal 10-kHz clock, no connection is necessary. If
external clocking is desired, connect INT/EXT to VDD– and the external clock to CLK IN. The external clock trip
point is 2.5 V above the negative rail; however, CLK IN can be driven from the negative rail to 5 V above the
negative rail. This allows the TLC2654 to be driven directly by 5-V TTL and CMOS logic when operating in the
single-supply configuration. If this 5-V level is exceeded, damage could occur to the device unless the current
into CLK IN is limited to
±5 mA. A divide-by-two
frequency divider interfaces with CLK IN and sets
the chopping frequency. The chopping frequency
appears on CLK OUT.
overload recovery/output clamp
When large differential-input-voltage conditions
are applied to the TLC2654, the nulling loop
attempts to prevent the output from saturating by
driving CXA and CXB to internally-clamped voltage
levels. Once the overdrive condition is removed,
a period of time is required to allow the built-up
charge to dissipate. This time period is defined as
overload recovery time (see Figure 34). Typical
overload recovery time for the TLC2654 is
significantly faster than competitive products;
however, this time can be reduced further by use
of internal clamp circuitry accessible through
CLAMP if required.
相關PDF資料
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