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參數(shù)資料
| 型號： | 5962-9306001MXA |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDIP28 |
| 封裝： | CERAMIC, DIP-28 |
| 文件頁數(shù)： | 2/4頁 |
| 文件大小： | 102K |
| 代理商： | 5962-9306001MXA |
REV. B
AD872A–SPECIFICATIONS
Table 1. Electrical Performance Characteristics
Conditions
AV
DD = +5 V, AVSS = –5 V,
DV
DD = +5 V, DRVDD = +5 V
Group A
Device
Limits
Test
Symbol
unless otherwise specified
Subgroups
Type
Min
Max
Units
Resolution
RES
1, 2, 3
01, 02
12
Bits
Differential Nonlinearity
1
DNL
All Codes Histogram
1, 2, 3
01, 02
12
Bits
Zero Error
B
POE
1
01, 02
0.75
±% FSR
Gain Error
A
E
1
01, 02
1.25
±% FSR
Zero Error Drift
TCB
POE
External 2.5 V Reference
2, 3
01, 02
0.30
±% FSR
Gain Error Drift
TCA
INT
Internal 2.5 V Reference
2, 3
01, 02
1.75
±% FSR
Gain Error Drift
TCA
EXT
External 2.5 V Reference
2, 3
01, 02
0.5
±% FSR
Power Supply Rejection
PSR
See Note 2
1, 2, 3
01, 02
0.125
±% FSR
Analog Input Range
V
IN
1, 2, 3
01, 02
1
±V
Input Resistance
R
IN
T
A = +25°C
01, 02
50 typ
k
Input Capacitance
C
IN
T
A = +25°C
01, 02
10 typ
pF
Internal Reference Output Voltage
V
REF
1, 2, 3
01, 02
2.46
2.54
V
Power Dissipation
PD
1, 2, 3
01, 02
1.3
W
Power Supply Current
IAV
DD
1, 2, 3
01, 02
92
mA
IAV
SS
150
IDV
DD
21
IDRV
DD
02
2
Signal-to-Noise and Distortion Ratio
S/(N + D)
f
IN = 1 MHz; fS = 10 MHz
1, 2, 3
01
61
dB
02
60
Total Harmonic Distortion
THD
f
IN = 1 MHz; fS = 10 MHz
1, 2, 3
01
–62
dB
02
–60
Logic Input High Voltage
V
IH
1, 2, 3
01, 02
2.0
V
Logic Input Low Voltage
V
IL
1, 2, 3
01, 02
0.8
V
Logic Input High Current (CLK)
I
IH
1, 2, 3
01
115
±A
Logic Input Low Current (CLK)
I
IL
1, 2, 3
01
115
±A
Logic Input High Current
(OEN, CLK)
I
IH
1, 2, 3
02
115
±A
Logic Input Low Current
(OEN, CLK)
I
IL
1, 2, 3
02
115
±A
Logic Output High Voltage
(
MSB—Bit 12, OTR)
V
OH
I
SOURCE = 500 A
1, 2, 3
01, 02
2.4
V
Logic Output Low Voltage
(
MSB—Bit 12, OTR)
V
OL
I
SINK = 1.6 mA
1, 2, 3
01, 02
0.4
V
Leakage
I
Z
Three State
1, 2, 3
02
10
±A
Clock Period
t
C
See Figure 1.
9, 10, 11
01, 02
100
ns
Output Delay
t
OD
See Figure 1.
9, 10, 11
01, 02
10
ns
NOTES
1Minimum resolution for which “No Missing Codes” is guaranteed.
2Test conditions for PSR: 4.75 V
≤ AV
DD ≤ 5.25 V, –5.25 V ≤ AVSS ≤ –4.75 V, 4.75 V ≤ DVDD ≤ 5.25 V.
–2–
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