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參數(shù)資料
| 型號： | 62371AB |
| 廠商： | Intel Corp. |
| 英文描述： | multi-function PCI device(多功能PCI設(shè)備) |
| 中文描述： | 多功能PCI設(shè)備（多功能的PCI設(shè)備） |
| 文件頁數(shù)： | 2/284頁 |
| 文件大?。?/td> | 1042K |
| 代理商： | 62371AB |
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82371AB (PIIX4)
E
2
4/9/97 2:23 PM PIIX4aDS
INTEL CONFIDENTIAL
(until publication date)
PRELIMINARY
The 82371AB PCI ISA IDE Xcelerator (PIIX4) is a multi-function PCI device implementing a PCI-to-ISA bridge
function, a PCI IDE function, a Universal Serial Bus host/hub function, and an Enhanced Power Management
function. As a PCI-to-ISA bridge, PIIX4 integrates many common I/O functions found in ISA-based PC
systems—two 82C37 DMA Controllers, two 82C59 Interrupt Controllers, an 82C54 Timer/Counter, and a Real
Time Clock. In addition to compatible transfers, each DMA channel supports Type F transfers. PIIX4 also
contains full support for both PC/PCI and Distributed DMA protocols implementing PCI-based DMA. The
Interrupt Controller has Edge or Level sensitive programmable inputs and fully supports the use of an external
I/O Advanced Programmable Interrupt Controller (APIC) and Serial Interrupts. Chip select decoding is provided
for BIOS, Real Time Clock, Keyboard Controller, second external microcontroller,
as well as two Programmable
Chip Selects. PIIX4 provides full Plug and Play compatibility.
PIIX4 can be configured as a Subtractive Decode
bridge or as a Positive Decode bridge.
This allows the use of a subtractive decode PCI-to-PCI bridge such as
the Intel 380FB PCIset which implements a PCI/ISA docking station environment.
PIIX4 supports two IDE connectors for up to four IDE devices providing an interface for IDE hard disks and CD
ROMs.
Up to four IDE devices can be supported in Bus Master mode.
PIIX4 contains support for “Ultra DMA/33”
synchronous DMA compatible devices.
PIIX4 contains a Universal Serial Bus (USB) Host Controller that is Universal Host Controller Interface (UHCI)
compatible. The Host Controller’s root hub has two programmable USB ports.
PIIX4 supports Enhanced Power Management, including full Clock Control, Device Management for up to
14 devices, and Suspend and Resume logic with Power On Suspend, Suspend to RAM or Suspend to Disk.
It
fully supports Operating System Directed Power Management via the Advanced Configuration and Power
Interface (ACPI) specification.
PIIX4 integrates both a System Management Bus (SMBus) Host and Slave
interface for serial communication with other devices.
Information in this document is provided in conjunction with Intel products. No license, express or implied, by estoppel or
otherwise, to any intellectual property rights is granted by this document or by the sale of Intel products. Except as provided in
Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express
or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular
purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not
intended for use in medical, life saving, or life sustaining applications.
Intel retains the right to make changes to specifications and product descriptions at any time, without notice.
The 82371AB PIIX4 may contain design defects or errors known as errata. Current characterized errata are available
on request.
Intel disclaims all liability, including liability for infringement of any proprietary rights, relating to use of information in this
specification. Intel does not warrant or represent that such use will not infringe such rights.
I2C is a two-wire communication bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was
developed by Intel. Implementation of the I2C bus/protocol or the SMBus bus/protocol may require licenses from various
entities, including Philips Electronics N.V. and North American Philips Corporation.
Third-party brands and names are the property of their respective owners.
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