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參數(shù)資料
| 型號(hào)： | 65C256 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 32K x 8 LOW POWER CMOS STATIC RAM |
| 中文描述： | 32K的× 8低功耗CMOS靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 4/11頁(yè) |
| 文件大?。?/td> | 74K |
| 代理商： | 65C256 |
4
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
03/24/04
IS65C256
ISSI
CAPACITANCE
(1,2)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
8
10
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25°C, f = 1 MHz, V
DD
= 5.0V.
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-20 ns
Symbol
t
RC
t
AA
t
OHA
t
ACS
t
DOE
t
LZOE
(2)
t
HZOE
(2)
t
LZCS
(2)
t
HZCS
(2)
t
PU
(3)
t
PD
(3)
Parameter
Min.
Max.
Unit
Read Cycle Time
20
—
ns
Address Access Time
—
20
ns
Output Hold Time
3
—
ns
CS
Access Time
—
20
ns
OE
Access Time
—
8
ns
OE
to Low-Z Output
0
—
ns
OE
to High-Z Output
0
9
ns
CS
to Low-Z Output
3
—
ns
CS
to High-Z Output
0
9
ns
CS
to Power-Up
0
—
ns
CS
to Power-Down
—
18
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
DATA RETENTION CHARACTERISTICS
Symbol
V
DR
I
DR
1
I
DR
2
I
DR
3
Parameter
V
DD
for retention of data
Data retention current
Data retention current
Data retention current
Test Conditions
Options
Min.
2.0
—
—
—
typ
(1)
Max.
—
150
300
500
Units
V
μA
μA
μA
V
DR
= 3.0V
V
DR
= 3.0V
V
DR
= 3.0V
A1
A2
A3
50
50
50
Note:
2. Typical values are measured at V
DD
= 3V, T
A
= 25
o
C, and not 100% tested.
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