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參數(shù)資料
| 型號： | 6812 |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | DABiC-IV, 20-BIT SERIAL-INPUT, LATCHED SOURCE DRIVER |
| 中文描述： | 達比奇第四，20位串行輸入，鎖存源驅(qū)動 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 178K |
| 代理商： | 6812 |
6812
20-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
ELECTRICAL CHARACTERISTICS at T
A
= +25
°
C (A6812S-) or over operating temperature
range (A6812E-), V
BB
= 60 V unless otherwise noted.
Limits @ V
DD
= 3.3 V Limits @ V
DD
= 5 V
Characteristic
Symbol
Test Conditions
Mln.
Typ.
Max.
Min.
Typ.
Max.
Units
Output Leakage Current
I
CEX
V
OUT
= 0 V
—
<-0.1
-15
—
<-0.1
-15
μ
A
Output Voltage
V
OUT(1)
I
OUT
= -25 mA
57.5
58.3
—
57.5
58.3
—
V
V
OUT(0)
I
OUT
= 1 mA
—
1.0
1.5
—
1.0
1.5
V
Output Pull-Down Current
I
OUT(0)
V
OUT
= 5 V to V
BB
2.5
5.0
—
2.5
5.0
—
mA
Input Voltage
V
IN(1)
2.2
—
—
3.3
—
—
V
V
IN(0)
—
—
1.1
—
—
1.7
V
Input Current
I
IN(1)
V
IN
= V
DD
—
<0.01
1.0
—
<0.01
1.0
μ
A
I
IN(0)
V
IN
= 0 V
—
<-0.01
-1.0
—
<-0.01
-1.0
μ
A
Input Clamp Voltage
V
IK
I
IN
= -200
μ
A
—
-0.8
-1.5
—
-0.8
-1.5
V
Serial Data Output Voltage
V
OUT(1)
I
OUT
= -200
μ
A
2.8
3.05
—
4.5
4.75
—
V
V
OUT(0)
I
OUT
= 200
μ
A
—
0.15
0.3
—
0.15
0.3
V
Maximum Clock Frequency
f
c
10*
—
—
10*
—
—
MHz
Logic Supply Current
I
DD(1)
All Outputs High
—
0.25
0.75
—
0.3
1.0
mA
I
DD(0)
All Outputs Low
—
0.25
0.75
—
0.3
1.0
mA
Load Supply Current
I
BB(1)
All Outputs High, No Load
—
3.0
6.0
—
3.0
6.0
mA
I
BB(0)
All Outputs Low
—
0.2
20
—
0.2
20
μ
A
Blanking
-to-
Output Delay
t
dis(BQ)
C
L
= 30 pF, 50% to 50%
—
0.7
2.0
—
0.7
2.0
μ
s
t
en(BQ)
C
L
= 30 pF, 50% to 50%
—
1.8
3.0
—
1.8
3.0
μ
s
Strobe
-to-
Output Delay
t
p(STH-QL)
R
L
= 2.3 k
, C
L
≤
30 pF
—
0.7
2.0
—
0.7
2.0
μ
s
t
p(STH-QH)
R
L
= 2.3 k
, C
L
≤
30 pF
—
1.8
3.0
—
1.8
3.0
μ
s
Output Fall Time
t
f
R
L
= 2.3 k
, C
L
≤
30 pF
2.4
—
12
2.4
—
12
μ
s
Output Rise Time
t
r
R
L
= 2.3 k
, C
L
≤
30 pF
2.4
—
12
2.4
—
12
μ
s
Output Slew Rate
dV/dt
R
L
= 2.3 k
, C
L
≤
30 pF
4.0
—
20
4.0
—
20
V/
μ
s
Clock
-to-
Serial Data Out Delay t
p(CH-SQX)
I
OUT
=
±
200
μ
A
—
50
—
—
50
—
ns
Negative current is defined as coming out of (sourcing) the specified device terminal.
Typical data is is for design information only and is at T
A
= +25
°
C.
* Operation at a clock frequency greater than the specified minimum is possible but not warranteed.
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